Invention Grant
- Patent Title: Interface layer for gate stack using O3 post treatment
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Application No.: US14666770Application Date: 2015-03-24
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Publication No.: US09698234B2Publication Date: 2017-07-04
- Inventor: Jorge A. Kittl , Mark S. Rodder , Wei-E Wang
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Convergent Law Group LLP
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L31/113 ; H01L29/51 ; H01L21/28 ; H01L29/778

Abstract:
Exemplary embodiments provide for fabricating a field effect transistor (FET) with an interface layer for a gate stack using an O3 post treatment. Aspects of the exemplary embodiments include: forming a semiconductor body upon a substrate; cleaning the surface of the semiconductor body; depositing a first dielectric layer on the semiconductor body; performing an O3 treatment to form a new interface layer that incorporates material from the substrate and material from the first dielectric layer; and performing gate stack processing, including deposition of a gate electrode.
Public/Granted literature
- US20160042956A1 INTERFACE LAYER FOR GATE STACK USING 03 POST TREATMENT Public/Granted day:2016-02-11
Information query
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