Invention Grant
- Patent Title: Substrate with conductive vias
- Patent Title (中): 带导电通孔的基板
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Application No.: US14196481Application Date: 2014-03-04
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Publication No.: US09596768B2Publication Date: 2017-03-14
- Inventor: Hong Bok We , Dong Wook Kim , Jae Sik Lee , Shiqun Gu
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H05K3/42
- IPC: H05K3/42 ; H05K1/03 ; H05K1/11 ; H05K3/00 ; H01L21/768 ; H01L23/48 ; H01L23/498 ; H01L21/48

Abstract:
A substrate includes a plurality of vias that are lined with dielectric polymer having a substantially uniform thickness. This substantial uniform thickness provides a lumen within each dielectric-polymer-layer-lined via that is substantially centered within the via. Subsequent deposition of metal into the lumen for each dielectric-polymer-layer-lined via thus provides conductive vias having substantially centered metal conductors.
Public/Granted literature
- US20150257282A1 SUBSTRATE WITH CONDUCTIVE VIAS Public/Granted day:2015-09-10
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