Invention Grant
- Patent Title: Overlay marks and semiconductor process using the overlay marks
- Patent Title (中): 覆盖标记和半导体工艺使用覆盖标记
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Application No.: US14687912Application Date: 2015-04-15
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Publication No.: US09490217B1Publication Date: 2016-11-08
- Inventor: Chia-Ching Lin , En-Chiuan Liou , Chia-Hung Wang , Sho-Shen Lee
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/68 ; H01L29/78
Abstract:
An overlay mark for determining the alignment between two separately generated patterns formed along with two successive layers above a substrate is provided in the present invention, wherein both the substrate and the overlay mark include at least two pattern zones having periodic structures with different orientations, and the periodic structures of the overlay mark are orthogonally overlapped with the periodic structures of the substrate.
Public/Granted literature
- US20160307850A1 OVERLAY MARKS AND SEMICONDUCTOR PROCESS USING THE OVERLAY MARKS Public/Granted day:2016-10-20
Information query
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