发明授权
- 专利标题: LLR computation device and error correction decoding device
- 专利标题(中): LLR计算装置和纠错解码装置
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申请号: US14343305申请日: 2012-10-05
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公开(公告)号: US09438377B2公开(公告)日: 2016-09-06
- 发明人: Kenya Sugihara , Wataru Matsumoto
- 申请人: Kenya Sugihara , Wataru Matsumoto
- 申请人地址: JP Tokyo
- 专利权人: Mitsubishi Electric Corporation
- 当前专利权人: Mitsubishi Electric Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, McClelland, Maier & Neustadt, L.L.P.
- 优先权: JP2011-259068 20111128
- 国际申请: PCT/JP2012/075992 WO 20121005
- 国际公布: WO2013/080668 WO 20130606
- 主分类号: H03M13/00
- IPC分类号: H03M13/00 ; H04L1/00 ; H04L25/06 ; H03M13/11 ; H04L27/38 ; H04L25/03
摘要:
A two-reference-point-pair determining unit 101 determines two reference point pairs by selecting two transmission symbol points with their LLR computation target bit being 0 and two transmission symbol points with their LLR computation target bit being 1. An LLR computation unit 113 assigns weights to the two LLRs calculated for the two reference point pairs, respectively, followed by adding them, and further adds to the addition result a correction term that may be zero sometimes, thus computing LLR for the two reference point pairs.
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