发明授权
- 专利标题： Phase-locked loop with an adjustable output divider
- 专利标题（中）： 带有可调输出分频器的锁相环
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申请号： US14562531申请日： 2014-12-05
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公开(公告)号： US09385769B2公开(公告)日： 2016-07-05
- 发明人: Mohamed N. Elzeftawi
- 申请人： Xilinx, Inc.
- 申请人地址： US CA San Jose
- 专利权人： XILINX, INC.
- 当前专利权人： XILINX, INC.
- 当前专利权人地址： US CA San Jose
- 代理商 W. Eric Webstad
- 主分类号： H04B1/00
- IPC分类号： H04B1/00 ; H04B1/16 ; H03D7/14 ; H04B1/04 ; H03L7/183
摘要：
An apparatus relates generally to providing a divided signal output. In such an apparatus, a controller is coupled to receive a reference frequency count and a feedback frequency count to determine a difference therebetween to provide a control setting. A divider is coupled to receive the control setting to provide the divided signal output. The divider includes an adjustable load impedance. The control setting is coupled to adjust the load impedance of the divider to adjust a self-resonance frequency of the divider.
公开/授权文献
- US20160164558A1 PHASE-LOCKED LOOP WITH AN ADJUSTABLE OUTPUT DIVIDER 公开/授权日：2016-06-09
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