Invention Grant
US09349749B2 Semiconductor device including SIU butted junction to reduce short-channel penalty 有权
半导体器件包括SIU对接结,以减少短沟道损耗

Semiconductor device including SIU butted junction to reduce short-channel penalty
Abstract:
A semiconductor device comprises first and second gate stacks formed on a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a dielectric layer interposed between a bulk substrate layer and an active semiconductor layer. A first extension implant portion is disposed adjacent to the first gate stack and a second extension implant portion is disposed adjacent to the second gate stack. A halo implant extends continuously about the trench. A butting implant extends between the trench and the dielectric layer. An epitaxial layer is formed at the exposed region such that the butting implant is interposed between the epitaxial layer and the dielectric layer.
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