Invention Grant
US09276010B2 Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology
有权
双金属硅化物形成方法在高k金属栅极（HKMG）技术中嵌入分离栅极闪存
- Patent Title: Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology
- Patent Title (中): 双金属硅化物形成方法在高k金属栅极（HKMG）技术中嵌入分离栅极闪存
-
Application No.: US14296496Application Date: 2014-06-05
-
Publication No.: US09276010B2Publication Date: 2016-03-01
- Inventor: Harry-Hak-Lay Chuang , Wei Cheng Wu , Ya-Chen Kao , Fang-Lan Chu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L29/88
- IPC: H01L29/88 ; H01L21/336 ; H01L27/115 ; H01L29/792 ; H01L29/78 ; H01L29/66
Abstract:
The present disclosure relates to a structure and method for embedding a non-volatile memory (NVM) in a high-K metal gate (HKMG) integrated circuit that utilizes a replacement gate technology with low poly resistance and high program/erase speed. A silicide layer formed over top surfaces of the NVM device, after replacement gate process of the HKMG circuit prevents poly damage during contact formation and provides low gate resistance, thereby improving program/erase speed of the NVM device.
Public/Granted literature
- US20150333082A1 DUAL SILICIDE FORMATION METHOD TO EMBED SPLIT GATE FLASH MEMORY IN HIGH-K METAL GATE (HKMG) TECHNOLOGY Public/Granted day:2015-11-19
Information query
IPC分类:
