Invention Grant
- Patent Title: Method of manufacturing semiconductor device and semiconductor device
- Patent Title (中): 制造半导体器件和半导体器件的方法
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Application No.: US14139948Application Date: 2013-12-24
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Publication No.: US08994175B2Publication Date: 2015-03-31
- Inventor: Masaki Watanabe , Shinji Baba , Muneharu Tokunaga , Toshihiro Iwasaki
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2013-061089 20130322
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00

Abstract:
To improve coupling reliability in flip chip bonding of a semiconductor device. By using, in the fabrication of a semiconductor device, a wiring substrate in which a wiring that crosses an opening area of a solder resist film on the upper surface of the wiring substrate has, on one side of the wiring, a bump electrode and, on the other side, a plurality of wide-width portions having no bump electrode thereon, a solder on the wiring can be dispersed to each of the wide-width portions during reflow treatment in a solder precoating step. Such a configuration makes it possible to reduce a difference in height between the solder on each of terminals and the solder on each of the wide-width portions and to enhance the coupling reliability in flip chip bonding.
Public/Granted literature
- US20140284789A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2014-09-25
Information query
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