An image capture and processing (ICP) integrated circuit (IC) is provided for a camera. The ICP IC includes an imaging array which, in turn, includes image pixel capture sensors arranged in rows and columns. A row decoder extends along a first edge of the imaging array and is configured to enable sensor rows in the imaging array. An analog signal processor (ASP) system extends along a second edge of the imaging array and is configured to amplify signals from enabled sensors in columns of the imaging array. A control circuit is configured to sequentially enable the rows so that the ASP can amplify signals from all of the sensors in the imaging array, one row at a time.