发明授权
- 专利标题： Memory efficient implementation of LDPC decoder
- 专利标题（中）： 存储器高效实现LDPC解码器
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申请号： US13027277申请日： 2011-02-15
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公开(公告)号： US08879640B2公开(公告)日： 2014-11-04
- 发明人: Felix Chow , Chun Hang Lee
- 申请人： Felix Chow , Chun Hang Lee
- 申请人地址： CN Hong Kong Science Park, Shatin, New Territories, Hong Kong
- 专利权人： Hong Kong Applied Science and Technology Research Institute Company Limited
- 当前专利权人： Hong Kong Applied Science and Technology Research Institute Company Limited
- 当前专利权人地址： CN Hong Kong Science Park, Shatin, New Territories, Hong Kong
- 代理机构： Ella Cheong Hong Kong
- 代理商 Sam T. Yip
- 主分类号： H04N7/12
- IPC分类号： H04N7/12 ; H04N11/02 ; H04N11/04 ; H03D1/00 ; H04L27/06 ; G06F21/00 ; G06F13/00
摘要：
A computer processor implementable method of decoding low-density parity-check (LDPC) code, comprising: receiving a log-likelihood-ratio (LLR) input bitstream; performing a combined bit-deinterleaving and reordering process on the LLR input bitstream and storing in a physical memory space, comprising: determining a logical memory address for each LLR bit in the LLR input bitstream, determining a physical memory address for each LLR bit in the LLR input bitstream from logical memory address of the LLR bit; decoding the LLR input bitstream stored in the physical memory space; and performing a combined de-reordering and de-mapping process on the decoded LLR input bitstream.
公开/授权文献
- US20120207224A1 MEMORY EFFICIENT IMPLEMENTATION OF LDPC DECODER 公开/授权日：2012-08-16
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