Invention Grant
- Patent Title: Post passivation structure for a semiconductor device and packaging process for same
- Patent Title (中): 用于半导体器件的钝化结构及其封装工艺
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Application No.: US12264271Application Date: 2008-11-04
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Publication No.: US08558383B2Publication Date: 2013-10-15
- Inventor: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
- Applicant: Mou-Shiung Lin , Chien-Kang Chou , Ke-Hung Chen
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Seyfarth Shaw LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.
Public/Granted literature
- US20090057895A1 POST PASSIVATION STRUCTURE FOR A SEMICONDUCTOR DEVICE AND PACKAGING PROCESS FOR SAME Public/Granted day:2009-03-05
Information query
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