发明授权
US08493954B2 Method and apparatus for reducing digital to analog conversion (DAC) bits in frequency division multiple access (FDMA) system
失效
用于减少频分多址(FDMA)系统中的数模转换(DAC)位的方法和装置
- 专利标题: Method and apparatus for reducing digital to analog conversion (DAC) bits in frequency division multiple access (FDMA) system
- 专利标题(中): 用于减少频分多址(FDMA)系统中的数模转换(DAC)位的方法和装置
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申请号: US12337702申请日: 2008-12-18
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公开(公告)号: US08493954B2公开(公告)日: 2013-07-23
- 发明人: Jun-Kyu Kang , In-Tae Kang , Jeong-Gil Lee , Bo-Rham Lee , Sang-Min Bae
- 申请人: Jun-Kyu Kang , In-Tae Kang , Jeong-Gil Lee , Bo-Rham Lee , Sang-Min Bae
- 申请人地址: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- 代理机构: Cha & Reiter, LLC
- 优先权: KR10-2007-0133073 20071218
- 主分类号: H04L27/08
- IPC分类号: H04L27/08 ; H04B7/208 ; H04B1/44 ; H04B7/204 ; H04B1/04 ; H04B1/06 ; H04B7/00 ; H01Q11/12
摘要:
A method and an apparatus for reducing Digital-to-Analog Conversion (DAC) bits at a transmitter of a Frequency Division Multiple Access (FDMA) system reduces a number of the bits for conversion so as to save power and reduce the cost of operation. The method can include generating a digital signal gain control value and an analog signal gain control value using subcarrier allocation information, a required Signal to Noise Ratio (SNR), and a Peak to Average Power Ratio (PAPR); controlling a gain of a signal input to a digital-to-analog converter using the digital signal gain control value; converting a digital signal of the controlled gain to an analog signal using the digital-to-analog converter; and restoring an original signal by controlling a gain of a signal output from the digital-to-analog converter using the analog signal gain control value.
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