A computer-implemented method of measuring bridge fault coverage for a test pattern for a circuit design to be implemented within a programmable logic device can include identifying simulation results and stuck at coverage of the circuit design for the test pattern (610, 620). Pairs of nets in the circuit design that are adjacent can be identified (625). Each type of bridge fault for which each pair is tested can be determined according to the simulation results (640, 645, 655, 660). A measure of bridge fault coverage for the test pattern can be calculated according to which types of bridge faults each pair is tested and which net of each pair acts as an aggressor for each type of bridge fault tested (675). The measure of bridge fault coverage can be output (680).