Invention Grant
- Patent Title: Stacked electronic component and manufacturing method thereof
- Patent Title (中): 堆叠电子元件及其制造方法
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Application No.: US11132290Application Date: 2005-05-19
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Publication No.: US07629695B2Publication Date: 2009-12-08
- Inventor: Atsushi Yoshimura , Naoyuki Komuta , Hideo Numata
- Applicant: Atsushi Yoshimura , Naoyuki Komuta , Hideo Numata
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JPP2004-150046 20040520; JPP2004-150047 20040520
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/02 ; H01L23/14 ; H01L23/34 ; H01L23/29 ; H01L25/11 ; H01L23/31

Abstract:
A stacked electronic component comprises a first electronic component adhered on a substrate via a first adhesive layer, and a second electronic component adhered by using a second adhesive layer thereon. The second adhesive layer has a two-layer structure formed by a same material and having different modulus of elasticity. The second adhesive layer of the two-layer structure has a first layer disposed at the first electronic component side and a second layer disposed at the second electronic component side. The first layer softens or melts at an adhesive temperature. The second layer maintains a layered shape at the adhesive temperature. According to the stacked electronic component, occurrences of an insulation failure and a short circuiting are prevented, and in addition, a peeling failure between the electronic components, an increase of a manufacturing cost, and so on, can be suppressed.
Public/Granted literature
- US20060139893A1 Stacked electronic component and manufacturing method thereof Public/Granted day:2006-06-29
Information query
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