发明授权
- 专利标题： Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
- 专利标题（中）： 在高电流半导体器件中制造低电阻，低电感互连的方法
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申请号： US11218408申请日： 2005-09-01
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公开(公告)号： US07335536B2公开(公告)日： 2008-02-26
- 发明人: Bernhard P. Lange , Anthony L. Coyle , Quang X. Mai
- 申请人： Bernhard P. Lange , Anthony L. Coyle , Quang X. Mai
- 申请人地址： US TX Dallas
- 专利权人： Texas Instruments Incorporated
- 当前专利权人： Texas Instruments Incorporated
- 当前专利权人地址： US TX Dallas
- 代理商 Tum B. Thach; W. James Brady, III; Frederick J. Telecky, Jr.
- 主分类号： H01L21/82
- IPC分类号： H01L21/82 ; H01L21/44
摘要：
A method for fabricating a low resistance, low inductance device for high current semiconductor flip-chip products. A structure is produced, which comprises a semiconductor chip with metallization traces, copper lines in contact with the traces, and copper bumps located in an orderly and repetitive arrangement on each line so that the bumps of one line are positioned about midway between the corresponding bumps of the neighboring lines. A substrate is provided which has elongated copper leads with first and second surfaces, the leads oriented at right angles to the lines. The first surface of each lead is connected to the corresponding bumps of alternating lines using solder elements. Finally, the assembly is encapsulated in molding compound so that the second lead surfaces remain un-encapsulated.
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