Invention Grant
US5959885A Non-volatile memory array using single poly EEPROM in standard CMOS
process
失效
在标准CMOS工艺中使用单个多层EEPROM的非易失性存储器阵列
- Patent Title: Non-volatile memory array using single poly EEPROM in standard CMOS process
- Patent Title (中): 在标准CMOS工艺中使用单个多层EEPROM的非易失性存储器阵列
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Application No.: US828151Application Date: 1997-03-27
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Publication No.: US5959885APublication Date: 1999-09-28
- Inventor: Kameswara K. Rao
- Applicant: Kameswara K. Rao
- Applicant Address: CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: CA San Jose
- Main IPC: G11C16/08
- IPC: G11C16/08 ; G11C16/10 ; G11C11/34
Abstract:
Non-volatile storage elements are provided in an array on an integrated circuit, where the non-volatile storage elements are low voltage CMOS devices and hence compatible in a manufacturing sense with other similar transistors on an integrated circuit. The non-volatile storage elements are either EEPROM floating gate transistor cells, or other EEPROM cells using standard low voltage CMOS devices.
Public/Granted literature
- US5152602A Electric candle Public/Granted day:1992-10-06
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