A voltage limiter includes a first FET of a given polarity having the source electrode adapted to be connected to a positive supply terminal. There is a second FET of an opposite polarity to said first and having the source electrode adapted to be connected to a supply terminal which is negative with respect to said positive terminal. The voltage at each terminal may typically vary during operation. There is a voltage clamp means connected between the drain electrodes of said first and second FETs with the gate electrode of the first FET connected to the drain electrode of the second FET and with the gate electrode of the second FET connected to the drain electrode of the first FET, to cause the voltage across said voltage clamping means to remain constant in spite of variations in said positive and negative supplies. The voltage across the drain electrodes of the FETs is further employed as a biasing source for additional logic circuits. An output logic inverter operating with the logic circuits always has its switch point accurately defined with respect to the voltage limiting apparatus. Due to the constant voltage difference provided by the voltage limiter, the propagation delay through the logic circuits is constant with the output inverter having a controlled switching point.