Invention Application
- Patent Title: SEMICONDUCTOR DEVICE WITH GATE ELECTRICAL CONTACT FORMING JUNCTIONS HAVING DIFFERENT ENERGY BARRIER HEIGHTS TO GATE LAYER
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Application No.: US18361997Application Date: 2023-07-31
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Publication No.: US20250048667A1Publication Date: 2025-02-06
- Inventor: Ujwal Radhakrishna , Zhikai Tang , Johan Strydom , Jungwoo Joh
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/40 ; H01L29/423 ; H01L29/45 ; H01L29/47 ; H01L29/872

Abstract:
The present disclosure generally relates to a semiconductor device that includes a gate electrical contact that forms junctions with different energy barrier heights to a gate layer. In an example, a semiconductor device includes a semiconductor substrate, a drain electrical contact, a source electrical contact, a barrier layer, a gate layer, and a gate electrical contact. The drain and source electrical contacts are on the semiconductor substrate. The barrier layer is over a channel region of the semiconductor substrate between the drain and source electrical contacts. The gate layer is over the barrier layer. The gate layer includes first and second semiconductor portions. The gate electrical contact contacts the gate layer. The gate electrical contact includes first and second metal portions. The first and second metal portions form first and second junctions with the first and second semiconductor portions, respectively. The first and second junctions have different energy barrier heights.
Information query
IPC分类: