Invention Publication
- Patent Title: READ DISTURB MITIGATION BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED FOR READ CALIBRATION
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Application No.: US18657672Application Date: 2024-05-07
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Publication No.: US20240296896A1Publication Date: 2024-09-05
- Inventor: Patrick Robert Khayat , James Fitzpatrick , AbdelHakim S. Alhussien , Sivagnanam Parthasarathy
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G06F18/214 ; G06N20/00 ; G11C7/02 ; G11C16/10 ; G11C16/26 ; G11C16/30

Abstract:
A memory device to perform a read disturb mitigation operation. For example, the memory device can measure signal and noise characteristics of a group of memory cells to determine an optimized read voltage of the group of memory cells and determine a margin of read disturb accumulated in the group of memory cells. Subsequently, the memory device can identify the group of memory cells for the read disturb mitigation operation based on the margin of read disturb and a predetermined threshold.
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