Invention Publication
- Patent Title: TEMPLATE STRUCTURE FOR QUASI-MONOLITHIC DIE ARCHITECTURES
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Application No.: US17891665Application Date: 2022-08-19
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Publication No.: US20240063066A1Publication Date: 2024-02-22
- Inventor: Omkar G. Karhade , Tomita Yoshihiro , Adel A. Elsherbini , Bhaskar Jyoti Krishnatreya , Tushar Talukdar , Haris Khan Niazi , Yi Shi , Batao Zhang , Wenhao Li , Feras Eid
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/04
- IPC: H01L23/04 ; H01L25/065 ; H01L23/18 ; H01L23/00 ; H01L23/48 ; H01L23/46 ; H01L23/367

Abstract:
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first die having a surface; a template structure having a first surface and an opposing second surface, wherein the first surface of the template structure is coupled to the surface of the first die, and wherein the template structure includes a cavity at the first surface and a through-template opening extending from a top surface of the cavity to the second surface of the template structure; and a second die within the cavity of the template structure and electrically coupled to the surface of the first die by interconnects having a pitch of less than 10 microns between adjacent interconnects.
Information query
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