Invention Publication
- Patent Title: Buried Metal Techniques
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Application No.: US17874611Application Date: 2022-07-27
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Publication No.: US20240038297A1Publication Date: 2024-02-01
- Inventor: Rahul Mathur , Mudit Bhargava
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Main IPC: G11C11/419
- IPC: G11C11/419 ; G11C11/412 ; H01L27/11

Abstract:
Various implementations described herein are related to a device having bitline drivers coupled to passgates of bitcells via bitlines and buried metal lines formed within a substrate including a buried enable signal line and a buried ground line coupled to ground connections of the bitline drivers. The buried enable signal line transfers a negative bias to a selected bitline of the bitlines via the buried ground line that is coupled to the ground connections of the bitline drivers so as to increase gate-source bias of the passgates of the selected bitcell to thereby enhance write capability of the selected bitcell.
Information query
IPC分类: