发明公开
- 专利标题: STRESS RELAXATION TRENCHES FOR GALLIUM NITRIDE MICROLED LAYERS ON SILICON SUBSTRATES
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申请号: US17745056申请日: 2022-05-16
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公开(公告)号: US20230369532A1公开(公告)日: 2023-11-16
- 发明人: Tyler Sherwood , Raghav Sreenivasan
- 申请人: Applied Materials, Inc.
- 申请人地址: US CA Santa Clara
- 专利权人: Applied Materials, Inc.
- 当前专利权人: Applied Materials, Inc.
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L33/00
- IPC分类号: H01L33/00 ; H01L25/075
摘要:
A microLED-quality layer of gallium nitride (GaN) may be formed above a silicon substrate for microLED devices to be formed. Typically, mismatches between the crystal lattice of the GaN and the silicon substrate cause internal stresses that bow the wafer. To relieve these stresses, a pattern of trenches may be etched into the GaN layer between the die or device footprints. These trenches may be etched through the GaN layer, down to the depth of the silicon substrate, or even down into the silicon substrate. Instead of one singular, large wafer with internal stresses, the wafer may thus be divided into multiple small sections with minimal internal stresses. A dielectric gap fill may be applied to fill the trenches, and the resulting wafer may be planarized to expose the surface of the GaN after the gap fill.
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