Invention Application
- Patent Title: DIELECTRIC LAYER ON SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
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Application No.: US17393584Application Date: 2021-08-04
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Publication No.: US20220384611A1Publication Date: 2022-12-01
- Inventor: Cheng-I Lin , Ming-Ho Lin , Chun-Heng Chen , Yung-Cheng Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L29/78

Abstract:
A method of forming a semiconductor device includes forming a first layer on a semiconductor fin; forming a mask on the first layer, the mask being thicker on a top of the semiconductor fin than along a sidewall of the semiconductor fin. The first layer is thinned along the sidewall of the semiconductor fin using the mask. A second layer is formed on the semiconductor fin, the second layer covering the mask and the first layer. A dummy gate layer is formed on the semiconductor fin and patterned to expose a top surface of the semiconductor fin.
Information query
IPC分类: