- 专利标题: METHOD FOR MANUFACTURING LATERALLY INSULATED-GATE BIPOLAR TRANSISTOR
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申请号: US15541155申请日: 2015-09-28
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公开(公告)号: US20170358657A1公开(公告)日: 2017-12-14
- 发明人: Feng HUANG , Guangtao HAN , Guipeng SUN , Feng LIN , Longjie ZHAO , Huatang LIN , Bing ZHAO , Lixiang LIU , Liangliang PING , Fengying CHEN
- 申请人: CSMC TECHNOLOGIES FAB1 CO., LTD.
- 申请人地址: CN Wuxi New District, Jiangsu
- 专利权人: CSMC TECHNOLOGIES FAB1 CO., LTD.
- 当前专利权人: CSMC TECHNOLOGIES FAB1 CO., LTD.
- 当前专利权人地址: CN Wuxi New District, Jiangsu
- 优先权: CN201410849111.X 20141230
- 国际申请: PCT/CN2015/090965 WO 20150928
- 主分类号: H01L29/66
- IPC分类号: H01L29/66 ; H01L29/40 ; H01L21/311 ; H01L29/739 ; H01L29/06 ; H01L21/02 ; H01L21/265
摘要:
The present invention relates to a method for manufacturing a laterally insulated-gate bipolar transistor, comprising: providing a wafer having an N-type buried layer (10), an STI (40), and a first N well (22)/a first P well (24) which are formed successively from above a substrate; depositing and forming a high-temperature oxide film on the first N well (22) of the wafer; performing thermal drive-in on the wafer and performing photoetching and etching on the high-temperature oxide film to form a mini oxide layer (60); performing photoetching and ion implantation so as to form a second N well (32) inside the first N well (22) and second P wells (34) inside the first N well (22) and the first P well (24); then successively forming a gate oxide layer and a polysilicon gate (72), wherein one end of the gate oxide layer and the polysilicon gate (72) extends onto the second P well (34) inside the first N well (22), and the other end extends onto the mini oxide layer (60) on the second N well (32); and photoetching and injecting N-type ions between the mini oxide layer (60) and the STI (40) adjacent to the mini oxide layer (60) to form a drain electrode, and at the same time forming a source electrode (51) inside the second P well (34).
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