Invention Application
- Patent Title: ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE
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Application No.: US15494034Application Date: 2017-04-21
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Publication No.: US20170309579A1Publication Date: 2017-10-26
- Inventor: Po-Hao Wang , Chang-Fu Lin , Chun-Tang Lin , Bo-Hao Chang
- Applicant: Siliconware Precision Industries Co., Ltd.
- Priority: TW105112802 20160425
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498 ; H01L23/31
Abstract:
Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.
Public/Granted literature
- US10763223B2 Substrate structure having chamfers Public/Granted day:2020-09-01
Information query
IPC分类:
