Invention Application
- Patent Title: HIGH MOBILITY STRAINED CHANNELS FOR FIN-BASED TRANSISTORS
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Application No.: US14935971Application Date: 2015-11-09
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Publication No.: US20160071934A1Publication Date: 2016-03-10
- Inventor: Stephen M. Cea , Anand S. Murthy , Glenn A. Glass , Daniel B. Aubertine , Tahir Ghani , Jack T. Kavalieros , Roza Kotlyar
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/78 ; H01L29/06 ; H01L29/165 ; H01L29/08

Abstract:
Techniques are disclosed for incorporating high mobility strained channels into fin-based transistors (e.g., FinFETs such as double-gate, trigate, etc), wherein a stress material is cladded onto the channel area of the fin. In one example embodiment, silicon germanium (SiGe) is cladded onto silicon fins to provide a desired stress, although other fin and cladding materials can be used. The techniques are compatible with typical process flows, and the cladding deposition can occur at a plurality of locations within the process flow. In some cases, the built-in stress from the cladding layer may be enhanced with a source/drain stressor that compresses both the fin and cladding layers in the channel. In some cases, an optional capping layer can be provided to improve the gate dielectric/semiconductor interface. In one such embodiment, silicon is provided over a SiGe cladding layer to improve the gate dielectric/semiconductor interface.
Public/Granted literature
- US09893149B2 High mobility strained channels for fin-based transistors Public/Granted day:2018-02-13
Information query
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