Invention Grant
- Patent Title: Method for forming chip package structure
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Application No.: US17121051Application Date: 2020-12-14
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Publication No.: US11756892B2Publication Date: 2023-09-12
- Inventor: Shin-Puu Jeng , Shuo-Mao Chen , Feng-Cheng Hsu , Po-Yao Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- The original application number of the division: US16406874 2019.05.08
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/00 ; H01L21/56 ; H01L21/48 ; H01L21/78 ; H01L23/31 ; H01L25/16

Abstract:
A method for forming a chip package structure is provided. The method includes forming a first redistribution structure over a first carrier substrate. The method includes bonding a chip structure to the first surface through a first conductive bump. The method includes forming a first molding layer over the first redistribution structure. The method includes removing the first carrier substrate. The method includes forming a second conductive bump over the second surface. The method includes forming a second redistribution structure over a second carrier substrate. The method includes bonding the first redistribution structure to the third surface. The method includes forming a second molding layer over the second redistribution structure. The method includes removing the second carrier substrate. The method includes removing a portion of the second redistribution structure from the fourth surface. The method includes forming a third conductive bump over the fourth surface.
Public/Granted literature
- US20210098379A1 METHOD FOR FORMING CHIP PACKAGE STRUCTURE Public/Granted day:2021-04-01
Information query
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