A clock detecting circuit is provided. The clock detecting circuit includes a first clock converting circuit, a second clock converting circuit and a frequency comparator. The first clock converting circuit converts an internal clock to a first clock. The second clock converting circuit converts an external clock to a second clock. The frequency comparator generates a first edge clock in response the first clock and generates a second edge clock in response the second clock. The frequency comparator generates a first sensing voltage in response to a plurality of positive pulses of the first edge clock and generate a second sensing voltage in response to a plurality of positive pulses of the second edge clock. The frequency comparator compares the first sensing voltage and the second sensing voltage to provide a frequency comparing result between the external clock and the internal clock.