- 专利标题: Multiple adjacent slicewise layout of voltage-controlled oscillator
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申请号: US17210260申请日: 2021-03-23
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公开(公告)号: US11349459B2公开(公告)日: 2022-05-31
- 发明人: Armin Tajalli , Yohann Mogentale , Fabio Licciardello
- 申请人: Kandou Labs SA
- 申请人地址: CH Lausanne
- 专利权人: Kandou Labs SA
- 当前专利权人: Kandou Labs SA
- 当前专利权人地址: CH Lausanne
- 代理机构: Invention Mine LLC
- 主分类号: H03K3/03
- IPC分类号: H03K3/03 ; H03B5/24 ; H03K5/00 ; H03L7/099
摘要:
Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances.
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