- 专利标题： Scalable vertical transistor bottom source-drain epitaxy
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申请号： US16732642申请日： 2020-01-02
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公开(公告)号： US11335804B2公开(公告)日： 2022-05-17
- 发明人: Chun-Chen Yeh , Ruilong Xie , Alexander Reznicek
- 申请人： International Business Machines Corporation
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理商 David K. Mattheis; Maeve M. Carpenter
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L27/088 ; H01L29/08 ; H01L29/10 ; H01L29/06 ; H01L29/66 ; H01L21/762 ; H01L21/3065 ; H01L21/8234 ; H01L21/02
摘要：
A method of forming a semiconductor device includes forming a sacrificial epitaxial layer upon a substrate, forming a stack of semiconductor material layers upon the sacrificial epitaxial layer, forming fin mandrels for vertical transistors, selectively etching the sacrificial epitaxial layer beneath the fin mandrels, forming source-drain regions beneath the fin mandrels, selectively removing portions of the fin mandrels creating the fins, and forming source-drain contacts electrically connected to the source-drain regions.
公开/授权文献
- US20210210631A1 SCALABLE VERTICAL TRANSISTOR BOTTOM SOURCE-DRAIN EPITAXY 公开/授权日：2021-07-08
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