- 专利标题： Apparatuses and methods of forming apparatuses using a partial deck-by-deck process flow
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申请号： US16707944申请日： 2019-12-09
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公开(公告)号： US11244725B2公开(公告)日： 2022-02-08
- 发明人: Akira Goda , Roger W. Lindsay
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Schwegman Lundberg & Woessner, P.A.
- 主分类号： H01L27/08
- IPC分类号： H01L27/08 ; H01L27/108 ; H01L27/11524 ; H01L27/088 ; H01L21/768 ; H01L21/822 ; H01L21/8239 ; H01L21/02 ; H01L21/311 ; G11C16/04 ; H01L27/11582 ; H01L27/11556
摘要：
Various embodiments include methods and apparatuses, such as memory cells formed on two or more stacked decks. A method includes forming a first deck with first levels of conductor material and first levels of dielectric material over a substrate. Each level of the conductor material is separated from an adjacent level of conductor material by at least one of the first levels of dielectric material. A first opening is formed through the first levels of conductor material and dielectric material. A sacrificial material is formed at least partially filling the first opening. A second deck is formed over the first deck. The second deck has second levels of conductor material and second levels of dielectric material with each level of the conductor material being separated from an adjacent level of conductor material by at least one of the second levels of dielectric material. Additional apparatuses and methods are disclosed.
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