A system is provided, comprising: a plurality of flip-flops that are configured to receive a reset signal, each of the plurality of flip-flops having a respective output port, and each of the plurality of flip-flops being configured to assume a respective default state when the reset signal is set to a predetermined value; and a reset monitor circuit that is coupled to the respective output port of each of the plurality of flip-flops, the reset monitor circuit being configured to generate a status signal indicating whether each of the flip-flops has assumed the flip-flop's respective default state after the reset signal is set to the predetermined value, wherein assuming a respective default state by each of the plurality of flip-flops results in a predetermined bit string being stored in the plurality of flip-flops.