- 专利标题： Differential dbus scheme for low-latency random read for NAND memories
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申请号： US16681968申请日： 2019-11-13
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公开(公告)号： US10984874B1公开(公告)日： 2021-04-20
- 发明人: Hiroki Yabe , Koichiro Hayashi , Takuya Ariki , Naoki Ookuma , Toru Miwa
- 申请人： SanDisk Technologies LLC
- 申请人地址： US TX Addison
- 专利权人： SanDisk Technologies LLC
- 当前专利权人： SanDisk Technologies LLC
- 当前专利权人地址： US TX Addison
- 代理机构： Dickinson Wright PLLC
- 代理商 Steven Hurles
- 主分类号： G11C16/28
- IPC分类号： G11C16/28 ; H01L27/11556 ; G11C16/04 ; G11C16/24 ; H01L27/11582
摘要：
A random access memory is provided including a plane structure comprising a plurality of sense amplifiers, each including a local data latch, a pair of local busses connected to each of the data latches, a differential data bus, and a pair of redrivers connected between the pair of local busses and the differential data bus.
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