Invention Grant
- Patent Title: Three-dimensional semiconductor memory devices and methods of fabricating the same
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Application No.: US16294425Application Date: 2019-03-06
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Publication No.: US10971516B2Publication Date: 2021-04-06
- Inventor: Sung-Soo Ahn , Yong-Hoon Son , Minhyuk Kim , Jae Ho Min , Daehyun Jang
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Myers Bigel, P.A.
- Priority: KR10-2018-0105507 20180904
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/28 ; H01L27/11565 ; H01L21/311 ; H01L27/1157

Abstract:
Integrated circuit devices and methods of forming the same are provided. The devices may include a substrate including a cell region and an extension region and conductive layers stacked on the cell region in a vertical direction. The conductive layers may extend onto the extension region and may have a stair-step structure on the extension region. The devices may also include vertical structures on the substrate. Each of the vertical structures may extend in the vertical direction, and the vertical structures may include a first vertical structure on the cell region and a second vertical structure on the extension region. The first vertical structure may extend through the conductive layers and may include a first channel layer, the second vertical structure may be in the stair-step structure and may include a second channel layer, and the second channel layer may be spaced apart from the substrate in the vertical direction.
Public/Granted literature
- US20200075627A1 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME Public/Granted day:2020-03-05
Information query
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