Invention Grant
- Patent Title: Method for forming trench structure of semiconductor device
-
Application No.: US15865072Application Date: 2018-01-08
-
Publication No.: US10854713B2Publication Date: 2020-12-01
- Inventor: Jia-Ming Lin , Shiu-Ko Jangjian , Chun-Che Lin , Ying-Lang Wang , Wei-Ken Lin , Chuan-Pu Liu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L21/314 ; H01L21/324 ; H01L21/762 ; H01L21/8234 ; H01L27/088 ; H01L29/78 ; H01L29/06 ; H01L21/02 ; H01L21/3065 ; H01L27/12 ; H01L21/84
Abstract:
A method includes forming a flowable dielectric layer in a trench of a substrate; curing the flowable dielectric layer; and annealing the cured flowable dielectric layer to form an insulation structure and a liner layer. The insulation structure is formed in the trench, the liner layer is formed between the insulation structure and the substrate, and the liner layer includes nitrogen.
Public/Granted literature
- US20180151667A1 METHOD FOR FORMING TRENCH STRUCTURE OF SEMICONDUCTOR DEVICE Public/Granted day:2018-05-31
Information query
IPC分类:
