- 专利标题： Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs
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申请号： US14867797申请日： 2015-09-28
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公开(公告)号： US10262905B2公开(公告)日： 2019-04-16
- 发明人: Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Qing Liu , Nicolas Loubet , Scott Luning
- 申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , STMicroelectronics, Inc. , GLOBALFOUNDRIES Inc.
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Tutunjian & Bitetto, P.C.
- 代理商 Vazken Alexanian
- 主分类号： H01L21/84
- IPC分类号： H01L21/84 ; H01L21/8238 ; H01L27/092 ; H01L29/16 ; H01L29/161 ; H01L27/12 ; H01L29/49 ; H01L29/10
摘要：
A method for semiconductor fabrication includes providing channel regions on a substrate including at least one Silicon Germanium (SiGe) channel region, the substrate including a plurality of regions including a first region and a second region. Gate structures are formed for a first n-type field effect transistor (NFET) and a first p-type field effect transistor (PFET) in the first region and a second NFET and a second PFET in the second region, the gate structure for the first PFET being formed on the SiGe channel region. The gate structure for the first NFET includes a gate material having a first work function and the gate structures for the first PFET, second NFET and second PFET include a gate material having a second work function such that multi-threshold voltage devices are provided.
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