Invention Grant
- Patent Title: Method of manufacturing a semiconductor device
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Application No.: US15854827Application Date: 2017-12-27
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Publication No.: US10236294B2Publication Date: 2019-03-19
- Inventor: Chien-Ting Ho , Shih-Fang Tzou , Chun-Yuan Wu , Li-Wei Feng , Yu-Chieh Lin , Ying-Chiao Wang , Tsung-Ying Tsai
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Agent Winston Hwu
- Priority: CN201611242446 20161229
- Main IPC: H01L27/105
- IPC: H01L27/105 ; H01L21/768 ; H01L21/02 ; H01L29/66 ; H01L21/311 ; H01L21/3105

Abstract:
The present invention proposes a method of manufacturing a semiconductor device, which includes the steps of providing a substrate with a memory region and a logic region, forming bit lines and logic gates respectively in the memory region and the logic region, wherein storage node regions are defined between bit lines, forming a first low-K dielectric layer on sidewalls of bit lines, forming a doped silicon layer in the storage node regions between bit lines, wherein the top surface of doped silicon layer is lower than the top surface of bit line, forming a second low-K dielectric layer on sidewalls of storage node regions, and filling up storage node regions with metal plugs.
Public/Granted literature
- US20180190656A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Public/Granted day:2018-07-05
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