- 专利标题: Semiconductor device and manufacturing method of the semiconductor device
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申请号: US15417242申请日: 2017-01-27
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公开(公告)号: US10128106B2公开(公告)日: 2018-11-13
- 发明人: Shinya Takashima , Katsunori Ueno , Masaharu Edo
- 申请人: FUJI ELECTRIC CO., LTD.
- 申请人地址: JP Kanagawa
- 专利权人: FUJI ELECTRIC CO., LTD.
- 当前专利权人: FUJI ELECTRIC CO., LTD.
- 当前专利权人地址: JP Kanagawa
- 优先权: JP2016-050798 20160315
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L21/265 ; H01L21/324 ; H01L23/482 ; H01L29/20 ; H01L29/32 ; H01L29/66 ; H01L29/78 ; H01L29/872 ; H01L29/36 ; H01L29/06
摘要:
When a defect region is present near the pn junction in a GaN layer, lattice defects are present in the depletion layer. Therefore, when a reverse bias is applied to the pn junction, the defects in the depletion layer cause the generated current to flow as a leakage current. The leakage current flowing through the depletion layer can cause a decrease in the withstand voltage at the pn junction. Provided is a semiconductor device using gallium nitride, including a gallium nitride layer including an n-type region. The gallium nitride layer includes a first p-type well region and a second p-type well region that is provided on at least a portion of the first p-type well region and has a peak region with a higher p-type impurity concentration than the first p-type well region.
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