Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US15271748Application Date: 2016-09-21
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Publication No.: US10103114B2Publication Date: 2018-10-16
- Inventor: Po Chun Lin
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW Taoyuan
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW Taoyuan
- Agency: Muncy, Geisler, Olds & Lowe, P.C.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L23/498

Abstract:
A semiconductor structure includes a substrate; a pad disposed over the substrate; a first passivation disposed over the substrate, partially covering the pad, and including a protrusion protruded from the first passivation and away from the substrate; a conductive layer disposed over the first passivation and a portion of the pad exposed from the first passivation; and a second passivation disposed over the conductive layer, wherein the conductive layer disposed over the protrusion is exposed from the second passivation.
Public/Granted literature
- US20180082963A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2018-03-22
Information query
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