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发明公开
CN101589468A 具有通过衬底的通路孔的系统级封装 无效 - 撤回

具有通过衬底的通路孔的系统级封装
摘要：
本发明涉及一种系统级封装，该系统级封装包括具有小于100μm厚度的集成衬底和多个通过衬底的通路，这些通过衬底的通路具有大于5的深宽比。第一芯片被附接至该集成衬底，并被布置在该集成衬底和支撑之间，该支撑适于在处理和操作过程中机械地支撑该集成衬底。根据本发明，在没有通过衬底的孔蚀刻步骤的情况下，可以制造该系统级封装。较大的深宽比暗示着减小的横向延伸，该减小的横向延伸允许增大集成密度和减小引线电感。
摘要（英）：

The present invention relates to a system-in-package that comprises an integration substrate with a thickness of less than 100 micrometer and a plurality of through- substrate vias, which have an aspect ratio larger than 5. A first chip is attached to the integration substrate and arranged between the integration substrate and a support, which is suitable for mechanically supporting the integration substrate during processing and handling. The system-in-package can be fabricated according to the invention without a through-substrate-hole etching step. The large aspect ratio implies reduced lateral extensions, which allow increasing the integration density and decreasing lead inductances.

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