US07672289B2
A method allocates and assigns addresses to nodes in an ad hoc wireless network. A set of potential addresses of nodes in an ad hoc wireless network are defined as having N fields, in which the number of bits in each field is one or more bits. A subset of the set addresses is allocated initially as addresses to be assigned to nodes joining the network, in which each address has N-K fields, where 0
US07672286B2
A method and system for providing acknowledgment and/or data rate control (DRC) information with respect to data packets conveyed on a plurality of active forward link (FL) carriers. The number of reverse link (RL) carriers employed for the acknowledgment and/or DRC information may be less than the number of active FL carriers, and may be a single carrier, even when the signaling protocol is, in the limit, consistent with presently-supported standardized CDMA protocols. Code multiplexing techniques are employed inventively to convey information for up to fifteen FL carriers on a single, standard CDMA channel designed to provide such signaling for only a single FL carrier at a time.
US07672269B2
A self-contained installation program having at least one payload condition is provided (314) and distributed (316) to a plurality of selected nodes, using a wireless link, that subsequently installs the self-contained program based, at least in part, on a correspondence with the at least one payload condition. Examples of such payload conditions include, but are not limited to, an ability to sense at least one physical property, a deployment role or physical address of the receiving node, a physical location of the receiving node, available node resources, group membership, and so forth.
US07672267B2
Network system and method for facilitating message exchange between mobile subscribers belonging to the same or different public land mobile networks, possibly incorporating different standards. Message exchange between two subscribers of the same or different networks may involve one or more lookups on subscription data, zero or more message transformations, one or more routing decisions including application of costing functions, and, storage and propagation of the message in one or more Core or Intermediary networks. The messages may be of type, among others, SMS (Short Message Service), MMS (Multimedia Message Service), or EMAIL. An aspect of the present invention provides a message routing subsystem that facilitates destination determination and delivery channel selection.
US07672257B2
A mobile customer service station operating within a wireless multi-hop communication network includes a console on a wheeled chassis. The console carries and houses a number of components which are used in merchandising operations to conclude customer purchase transactions. The items supported externally on the console are a printer for printing purchase receipts, customer credit charge agreements and records of transactions, and a magnetic card reader for reading information from a magnetic stripe of a customer's credit card. In one embodiment, the operation of the printer, credit card reader and the cash drawer is controlled by a multi-function control unit located within an enclosure of the console. The control unit is electrically powered by a self-contained power source which is preferably a deep cycle rechargeable battery. The console also houses a transceiver unit which under the control of the control unit is capable of interactive communication with a premises network. In another embodiment, the mobile service station comprises an access device which participates with a variety of peripherals at the station in a lower power communication LAN, while providing higher power communication to other network devices via a premises network with routing via a wireless spanning tree configuration.
US07672233B2
Techniques are described for managing traffic flow to an optical network terminal (ONT) on a passive optical network (PON) to prevent an individual ONT from being overrun. Specifically, the techniques involve reducing a transmission rate of a unique traffic flow and selectively denying access to a common traffic flow. By reducing the transmission rate of the unique traffic flow, sufficient bandwidth may be released to receive the unique traffic flow and the common traffic flow without overflowing the ONT. For example, the ONT or, alternatively, the OLT may send the requested common traffic flow without reducing the transmission rate of the unique traffic flow when sufficient bandwidth is available, send the common traffic flow but reduce the transmission rate of unique traffic flow by an appropriate amount, or deny access to the common traffic flow altogether without reducing the transmission rate of the unique traffic flow.
US07672230B2
A dynamic channel change technique is disclosed which may be implemented between nodes and a Head End of an access network. Initially a network device may communicate with the Head End via a first downstream channel and a first upstream channel. When the network device receives a dynamic channel change request which includes instructions for the network device to switch to a second downstream channel, the network device may respond by switching from the first downstream channel to the second downstream channel. Thereafter, the network device may communicate with the Head End via the second downstream channel and first upstream channel. Further, according to a specific embodiment, the dynamic channel change request may also include an upstream channel change request for causing the network device to switch from a first upstream channel to a second upstream channel.
US07672211B2
An optical pickup apparatus according to the present invention includes: a first light source for emitting a first light flux; a second light source for emitting a second light flux; a third light source for emitting a third light flux; and an objective optical element. The objective optical element has an optical surface including at least two areas provided with optical path difference providing structures. The objective optical element converges the first to third light fluxes each passing through the predetermined areas on the objective optical element onto respective information recording surfaces of the first to third optical disks. In the optical pickup apparatus, the third light flux which has passed through an optical path difference providing structure forms a first best focus and a second best focus.
US07672210B2
A holographic recording medium 10 is configured to have a recording layer 12 on which information can be recorded as holograms; and first and second heat generating layers 14A and 14B provided in a pair so as to sandwich the recording layer 12. Then, the first and second heat generating layers 14A and 14B are allowed to generate heat by being irradiated with a heat generating laser beam LB3 having a wavelength that is different from that of a signal beam LB1 or a reference beam LB2 for reproducing or recording information. The holographic recording medium and a method for recording and reproducing the same, and a recording and reproducing apparatus can compensate for shrinkage of the recording layer due to recording or variations in temperature, thereby allowing for reproduction of the holograms under optimum conditions.
US07672207B2
A method and apparatus for recording data in a recording medium are disclosed. The method for recording data in a recording medium including a wobble-shaped test area includes the steps of a) determining a pre-used test area, b) searching for a current OPC start position of the test area by counting the number of wobbles at a wobble-count reference position, c) performing an Optimum Power Control (OPC) process to calculate an optimum write power at the OPC start position, and d) recording data in a data area using the calculated the optimum write power. Therefore, the recording medium can be applied to a method for manufacturing a BD, and a disc test process and data recording/reproducing operations can be effectively performed.
US07672185B2
A monitor bank consists of test one time programmable memory that is programmed distinctively from functional one time programmable memory in order to determine whether the functional one time programmable memory has or will program successfully. In a specific embodiment, each monitor bank consists of a first eFuse configured to expectedly never blow, a second eFuse configured to expectedly always blow, and at least a third eFuse configured to be more difficult to blow than the first eFuse, but easier to blow than the second eFuse. The method of determining whether functional eFuses have or will be programmed successfully is described: programming a monitor bank; sensing whether the test eFuses have blown; creating a monitor bank bit line blow pattern; determining an anticipated bit line blow pattern; comparing the two patterns; and determining that the functional eFuses will not blow successfully if the patterns do not match.
US07672182B2
A SRAM memory with a read assist circuit is presented. The read assist circuit uses bitline voltage level switches, which are connected to a low power supply and a high power supply. The bitline voltage level switches have a write operation state, a read operation state, and a standby operation state. The write operation state selectively provides the high power supply to bitlines in columns selected for a write operation, and provides the low power supply to bitlines in the remaining columns. The read operation state selectively provides the low power supply to bitlines in columns selected for the read operation, and provides the low power supply to bitlines in the other columns. The standby operation state selectively provides the low power supply to bitlines in all columns when not in the read operation state or the write operation state.
US07672175B2
Systems and methods of selectively applying negative voltage to word lines during memory device read operation are disclosed. In an embodiment, a memory device includes a word line logic circuit coupled to a plurality of word lines and adapted to selectively apply a positive voltage to a selected word line coupled to a selected memory cell that includes a magnetic tunnel junction (MTJ) device and to apply a negative voltage to unselected word lines.
US07672173B2
For each memory block, a predecoder for predecoding an applied address signal, an address latch circuit for latching the output signal of the predecoder, and a decode circuit for decoding an output signal of the address latch circuit and performing a memory cell selecting operation in a corresponding memory block are provided. Propagation delay of latch predecode signals can be made smaller and the margin for the internal read timing can be enlarged. In addition, the internal state of the decoder and memory cell selection circuitry are reset to an initial state when a memory cell is selected and the internal data output circuitry is reset to an initial state in accordance with a state of internal data reading. Thus, a non-volatile semiconductor memory device that can decrease address skew and realize an operation with sufficient margin is provided.
US07672172B2
The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
US07672164B2
A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.
US07672159B2
A method of operating a multi-level cell is described, wherein the cell includes a substrate of a first conductivity type, a control gate, a charge-storing layer and two S/D regions of a second conductivity type. The method includes an erasing step that injects charges of a first type into the charge-storing layer and a programming step that includes applying a first voltage to the substrate, a second voltage to both S/D regions and a third voltage to the control gate. The difference between the first and second voltages is sufficient to cause band-to-band tunneling hot holes, and the third voltage causes charges of a second type to enter the charge-storing layer. The third voltage can have 2n−1 different values, for programming the cell to a predetermined state among 2n−1 storage states.
US07672158B2
A non-volatile semiconductor memory device comprises a memory cell array of data-rewritable non-volatile memory cells or memory cell units containing the memory cells, and a plurality of word lines each commonly connected to the memory cells on the same row in the memory cell array. In write pulse applying during data writing, a high voltage for writing is applied to a selected word line, and an intermediate voltage for writing is applied to at least two of non-selected word lines. The beginning of charging a first word line located between the selected word line and a source line to a first intermediate voltage for writing is followed by the beginning of charging a second word line located between the selected word line and a bit line contact to a second intermediate voltage for writing.
US07672143B2
In a computer system, a card holder is removably attached to a bracket to hold an add-in card in an I/O connector. The card holder is capable of being slid onto the bracket and a side edge of the add-in card.
US07672140B2
A circuit board configuration and method of packaging electronic component embedded into the circuit board in a manner that supports the electronic component thermally, electrically, and mechanically thereof, comprising a circuit board having a first surface and a circuit trace on the first surface; a recess or slot formed on the first surface defined by at least one sidewall that is oblique to the first surface of the circuit board; two or more plated surfaces on the at least one oblique sidewall and electrically connected to the circuit trace; and an electronic component having two or more electrical contact surfaces mounted to the two or more plated surfaces such that the electronic component is physically mounted to the oblique sidewall and in electrical communication with the circuit trace. The circuit board configuration may further comprise an encapsulant at least one end of the electronic component and a conductive material between the oblique sidewall and the electronic component to seal the electronic component inside the slot.
US07672137B2
A plasma display module that can optimize a position of an image board and connect an external image apparatus to a plasma display apparatus easily, and a plasma display apparatus including the plasma display module are disclosed. In one embodiment, the plasma display module includes: i) a chassis, ii) a plasma display panel supported by the chassis on a front portion of the chassis, the plasma display module comprising X electrodes and Y electrodes disposed parallel to each other, iii) an image board disposed on a rear portion of the chassis, and receiving and processing image signals input from an external device and iv) a Y electrode driving board disposed on the rear portion of the chassis, and electrically connected to the Y electrodes to apply the driving signals to the Y electrodes, wherein the Y electrode driving board and the image board are disposed on opposite sides of the chassis with respect to a center line crossing the chassis in a vertical direction.
US07672135B2
A heat sink includes a plurality of fins parallel to each other. The fins include a top portion having a flange. The opposite ends of each flange are rounded. Two rounded corners are located below the plane defined by the flange.
US07672130B2
A heat dissipating device includes a sealed container having hollow floors and floor-spacing assemblies. Each floor-spacing assembly includes hollow spacing walls. Each hollow spacing wall extends from a respective hollow floor and is spaced apart from an adjacent one of the hollow spacing walls of an adjacent one of the floor-spacing assemblies by an air gap. Each two adjacent ones of the hollow floors are interconnected through the hollow spacing walls disposed therebetween. The sealed container defines a liquid reservoir, a condensate reservoir, and a plurality of fluid passages extending through the hollow spacing walls and the hollow floors that are disposed between the liquid reservoir and the condensate reservoir.
US07672129B1
A cooling system for a heat producing component includes a base having two or more cells. The cells may include microchannel passages. A pump system may be coupled to the base. The pump system may circulate fluid independently in each of two or more of the cells. The pump system may include an array of two more magnetohydrodynamic pumps. Each magnetohydrodynamic pump may provide fluid to a different cell. A controller may control a flow rate in each one of cell of the cooling system independently one or more of other cells of the cooling system.
US07672119B2
An electronic device interface provides three different physical user interfaces. Users may fold or unfold the device to reveal one interface and hide the other two. A first module includes a first portion of a first interface. A second module includes a first portion of a second interface. A third module includes a second portions of the first and second interfaces. The second and third modules are folded together to hide the second interface and expose the first interface. The first and third modules are folded together to hide the first interface and expose the second interface. The third interface is exposed when the first and third modules and the second and third modules are folded together, hiding the first and second interfaces. The first modules can include a concave portion matching a convex portion of the third module to maintain a flush profile for the first and second interfaces.
US07672117B1
A cover assembly for an electronic device including a laptop or like portable computer, wherein the base is formed of an at least partially protective material and corresponds in dimension and configuration to an outer surface configuration of the electronic device. A retainer assembly comprises a plurality of retaining structures disposed within interior portions of the electronic computer and removably connected thereto so as to maintain the cover assembly in an operative position relative thereto. The retaining structures are disposed and dimensioned to facilitate a complete closure of the electronic device, while remaining at least partially, on the interior of the electronic device. An access structure includes at least one opening formed therein in aligned relation with connecting ports of the electronic device so as to facilitate access to the connecting ports through the at least one opening.
US07672113B2
Polymer-ceramic composite materials for use in the formation of capacitors, which materials exhibit very low changes in temperature coefficient of capacitance (TCC) in response to changes in temperature within the range of from about −55° C. to about 125° C. Specifically, these capacitor materials have a change in TCC ranging from about −5% to about +5%, in response to changes in temperature within the desired temperature range. The inventive composite materials comprise a blend of a polymer component and ferroelectric ceramic particles, wherein the polymer component includes at least one epoxy-containing polymer, and at least one polymer having epoxy-reactive groups. The inventive polymer-ceramic composite materials have excellent mechanical properties such as improved peel strength and lack of brittleness, electrical properties such as high dielectric constant, and improved processing characteristics.
US07672112B2
A component-embedded substrate includes a chip capacitor. The chip capacitor includes a ceramic laminate body and a plurality of terminal electrodes. The component-embedded substrate has a first principal surface and a second principal surface. At least two of the plurality of terminal electrodes are connected to the first principal surface and define a first terminal electrode group, and at least two of the plurality of terminal electrodes are connected to the second principal surface and define a second terminal electrode group. One terminal electrode in the first terminal electrode group is electrically connected to one terminal electrode in the second terminal electrode group via the internal electrodes, and capacitance is provided by a pair of the terminal electrodes in the first terminal electrode group via the dielectric layer, and capacitance is provided by a pair of the terminal electrodes in the second terminal electrode group via the dielectric layer. A direction in which the internal electrodes are stacked is parallel or substantially parallel to the two principal surfaces.
US07672102B2
In one aspect, a method for protection of an integrated circuit device includes but is not limited to detecting a first current in the integrated circuit device, wherein the first current is caused by a second current; and shunting the second current away from the integrated circuit device in response to detecting the first current. Such detecting may include but not be limited to detecting the first current by detecting a voltage drop across a sensing resistor, which may include but not be limited to using at least two sensing transistors. Such shunting may include but not be limited to using at least one shunting transistor.
US07672100B2
The present invention provides an ESD protection circuitry in a semiconductor integrated circuit (IC) having protected circuitry to prevent false triggering of the ESD clamp. The circuitry includes an SCR as an ESD clamp having an anode adapted for coupling to a first voltage source, and a cathode adapted for coupling to a second voltage source. The circuitry also includes at least one noise current buffer (NCB) coupled between at least one of a first trigger tap of the SCR and the first voltage source such that the first trigger tap of the SCR is coupled to a power supply.
US07672093B2
A high performance MTJ, and a process for manufacturing it, are described. A capping layer of NiFeHf is used to getter oxygen out of the free layer, thereby increasing the sharpness of the free layer-tunneling layer interface. The free layer comprises two NiFe layers whose magnetostriction constants are of opposite sign, thereby largely canceling one another.
US07672092B2
A method for manufacturing a magnetic field detecting element has the steps of: forming stacked layers by sequentially depositing a pinned layer, a spacer layer, a spacer adjoining layer which is adjacent to the spacer layer, a metal layer, and a Heusler alloy layer in this order, such that the layers adjoin each other; and heat treating the stacked layers in order to form the free layer out of the spacer adjoining layer, the metal layer, and the Heusler alloy layer. The spacer adjoining layer is mainly formed of cobalt and iron, and has a body centered cubic structure, and the metal layer is formed of an element selected from the group consisting of silver, gold, copper, palladium, or platinum, or is formed of an alloy thereof.
US07672087B2
Provided is an MR effect element in which the magnetization of the pinned layer is stably fixed even after going through high temperature process. The MR effect element comprises: a non-magnetic intermediate layer; a pinned layer and a free layer stacked so as to sandwich the non-magnetic intermediate layer; an antiferromagnetic layer stacked to have a surface contact with the pinned layer, for fixing a magnetization of the pinned layer to a direction in-plane of the pinned layer and perpendicular to a track width direction; and hard bias layers provided on both sides in the track width direction of the free layer, for applying a bias field to the free layer, a product λS×σ of a saturation magnetostriction constant λS of the pinned layer and an internal stress σ on a cross-section perpendicular to a layer surface of the hard bias layer being negative.
US07672086B1
A method and system for providing a current confined magnetic element is disclosed. The method and system include providing a pinned layer, providing a nonmagnetic spacer layer, and providing a free layer. The nonmagnetic spacer layer resides between the pinned layer and the free layer. The method and system also include sputtering a current confinement layer. The current confinement layer includes an insulator and a conductor that are immiscible. The conductor forms a plurality of nano-dots in an insulating matrix. At least a portion of the plurality of nano-dots extends through the current confinement layer.
US07672085B2
The invention provides a giant magneto-resistive effect device (CPP-GMR device) having a CPP (current perpendicular to plane) structure comprising a spacer layer, and a fixed magnetized layer and a free layer stacked one upon another with said spacer layer interleaved between them, with a sense current applied in a stacking direction, wherein the spacer layer comprises a first and a second nonmagnetic metal layer, each formed of a nonmagnetic metal material, and a semiconductor oxide layer interleaved between the first and the second nonmagnetic metal layer, wherein the semiconductor oxide layer that forms a part of the spacer layer is made of indium oxide (In2O3), or the semiconductor oxide layer contains indium oxide (In2O3) as its main component, and an oxide containing a tetravalent cation of SnO2 is contained in the indium oxide that is the main component. The semiconductor oxide layer that forms a part of the spacer layer can thus be made thick while the device has a low area resistivity as desired, ensuring much more favorable advantages: ever higher MR performance, prevention of device area resistivity variations, and much improved reliability of film characteristics.
US07672084B2
Composite thin-film magnetic head includes a substrate; a first insulation layer on the substrate; an MR read head element on the first insulation layer and provided with a lower shield layer, an upper shield layer and an MR layer with a sense current flowing perpendicular to a surface of the MR layer though the upper and lower shield layers; a second insulation layer on the MR read head element; an inductive write head element on the second insulation layer and provided with a lower magnetic pole layer, a recording gap layer, an upper magnetic pole layer with end portion opposed to an end portion of the lower magnetic pole layer through the recording gap layer and a write coil; and a nonmagnetic conductive layer electrically conducted with the lower shield layer and opposed to the substrate to increase the electrode area between the lower shield layer and the substrate.
US07672082B2
A flexible wiring board for a magnetic head assembly is provided. The flexible wiring board includes a wiring pattern connected to a head body at one end and to an external circuit system at the other end, an insulation protection film that protects the wiring pattern, and a base composed of a metal that extends over the insulation protection film and the wiring pattern. The base has a guide through hole that functions as a guide for bending the base. The guide through hole has a plurality of notches disposed at different positions in a length direction of the base. The notches reduce a remaining width of the base in a bend width direction of the base.
US07672076B2
Disclosed are a servo writer and a servo writing method capable of writing a servo signal onto a servo band of a magnetic tape in an excellent condition, regardless of the thickness of the magnetic tape. The servo writer includes a magnetic tape traveling system for traveling a magnetic tape, a DC erase head for magnetizing a servo band of the magnetic tape in one direction along the length of the magnetic tape, a servo signal write head for writing a servo signal onto the servo band in the direction opposite to the one direction, a servo signal read head for reading the servo signal from the servo band, and control device for controlling a degauss current supplied to the DC erase head, based on an output read from the servo signal by the servo signal read head.
US07672072B1
A disk drive is disclosed including a disk, and a head actuated over the disk. A refresh monitor is maintained for data stored on the disk, wherein the refresh monitor comprises an update function responsive to an operating parameter of the disk drive. A duration monitor is maintained, and the update function of the refresh monitor is modified in response to the duration monitor. The data stored on the disk is refreshed in response to the refresh monitor.
US07672066B2
A zoom lens includes, in order from an object to an image, a first lens group having positive refractive power, a second lens group having negative refractive power, a third lens group having positive refractive power, and a fourth lens group having positive refractive power, when varying a field angle from a wide-angle end to a telephoto end, the first lens group and the third lens group being moved to be located on the object side at the telephoto end rather than at the wide-angle end such that a distance between the first lens group and the second lens group increases, a distance between the second lens group and the third lens group decreases, and a distance between the third lens group and the fourth lens group increases.
US07672055B2
There is provided an optical device, having a light-transmitting substrate having at least two major surfaces (26) parallel to each other and edges; optical means (16) for coupling light waves located in a field-of-view into the substrate by internal reflection, and at least one partially reflecting surface (22) located in the substrate which is non-parallel to the major surfaces of the substrate, characterized in that at least one of the major surfaces is coated with a dichroic coating.
US07672046B2
An optical multilayer filter comprises a substrate, and an inorganic thin film that is composed of a plurality of layers and formed on the substrate. An uppermost surface layer of the inorganic thin film is a silicon oxide layer having a density of from 1.9 g/cm3 to 2.2 g/cm3.
US07672027B2
An image reading apparatus includes a reading unit, a control unit and a reference color region. The control unit includes a preliminary read processing unit, a first image acquisition unit, a second image acquisition unit and a reprocessing instruction unit. The reprocessing instruction unit specifies a schematic position of a reference region in the sub-scanning direction and instructs the preliminary read processing unit to perform preliminary reading again at the schematic position of the reference region.
US07672023B2
Embodiments herein observe the backing of the document handler to determine if a document was left on the platen and would block the scan head from scanning the documents as they are moved by the document handler. An embodiment herein comprises a transparent platen and a document handler on a first side of the platen. The document handler has a backing, and the backing is adapted to move media within the document handler. A scan head is positioned on a second side of the platen. The scan head remains stationary when scanning the media being moved by the document handler and the scan head moves when scanning media on the platen. The backing of the document handler has a surface that is distinguishable from the media such that the scan head can detect whether the media is on the platen and would block the scan head from scanning the media being moved by the document handler.
US07672020B2
Method for duplex printing on transparencies to create auto-stereoscopic enhancement to rendered images. On one side of the transparency is provided a uniform halftone with a selected median spatial frequency as printed. On the other side, the image for enhanced rendering consisting of two partitions is printed: that partition which is to be perceived as the background is printed using a halftone with spatial frequency equal to the median plus some delta x, while the other image partition is printed using a halftone with a spatial frequency equal to the median minus the same delta x. The spatial frequency difference creates a corresponding shift-magnification factor M with an amplified total depth of the shift-magnification factor M times the thickness of the transparency.
US07672011B2
A printer driver of a Non-PC controls to quantize image data at quantization resolution (resolution 1), convert the quantized data into data resolution (resolution 2), and then transfer the data of the data resolution to an engine unit of an image output apparatus. The engine unit converts the data resolution of the received data into recording resolution (resolution 3) for a recording medium. Here, the quantization resolution is set to be lower than the data resolution. Thus, processing loads in the image processing unit can be reduced, whereby it is possible to provide image output capable of maintaining image quality and speed even under the circumstance that there is no sufficient memory and high-speed CPU, and to provide image output capable of maintaining image quality and speed according to a matrix recording method flexibly coping with various environments and minimizing the load in the engine unit.
US07672010B2
In a method and system for generating document templates for print jobs, in which a document template is generated in a generation unit using static resource data that are combined into addressable data sets. The document template is registered in a resource administration unit. The resource administration unit generates a resource list in which the resource data sets used by the document template are listed. Using the resource list, the resource administration unit controls a transfer of the used resource data sets to a data processing device in which the document template is supplemented with variable data, whereby the resource administration unit in turn can be controlled via a superordinate program.
US07672006B2
A multi-functional print platform includes at least two marking engines that process information at different processing rates and a scheduler that distributes portions of a job across the at least two marking engines based at least on a content of the job and the different processing rates of the at least two marking engines.
US07672004B2
An image processing system connects a plurality of clients to an image processing apparatus via a network. The image processing apparatus includes a reading device that reads an image of an original document and generates a prescribed image signal, an image data generating device that applies prescribed image processing to the image signal to generate image data, and a memory that stores the image data. A format converting device is provided to convert an image format of the image data selected from the memory by one of plurality of client apparatuses into a prescribed format in accordance with a format condition designated by the client apparatus. A delivering device is provided to deliver the image data to the client apparatus in the prescribed format.
US07672002B2
A method for interactively viewing raster images using scalable vector graphics (SVG), including receiving an SVG document, the SVG document including a reference to a raster image within the SVG document, the reference indicating a rectangular portion, a display width and height, and an IP address for a server computer, passing the SVG document to an SVG viewer, rendering the SVG document, including requesting from the server computer a first portion of raster image data corresponding to the rectangular portion, display width and display height, the first portion of raster image data being derived from the raster image, receiving the first portion of raster image data from the server computer, displaying the first portion of raster image data, transmitting a user request for a different portion of the raster image data, receiving a modified SVG document, modified according to the different portion requested by the user, passing the modified SVG document to the SVG viewer for re-rendering. A system and a computer readable storage medium are also described and claimed.
US07672001B2
An apparatus and a method that can be used for qualitative or quantitative determination of the three-dimensional location of two bodies relative to one another which can be used, for example, to determine the mutual position of two bodies according to angular or translational coordinates. Furthermore, the apparatus and method can be used in a measurement robot or in a coordinate measurement device. The device composed of a device for emitting a light beam which is fanned in several planes and at least three, preferably four or more, optoelectronic line sensors or linear sensors for determination of the incidence points of the light beam which has been flared in several planes on the line sensors or an upstream target surface.
US07671994B2
A method of measuring the free chlorine level in a solution of chlorinated pool/spa water comprises a first sample of said solution having a first selected pH and a second sample of said solution having a second selected pH and determining first and second ultraviolet light (UV) transmissivity values for each of the first and second samples. The first and second transmissivity values are then used to determine the free chlorine level.
US07671993B2
In one embodiment, light having a first spectrum is filtered from a mixed light. Light having a second spectrum, different from the first spectrum, is also filtered from the mixed light. An intensity of the light having the first spectrum, and an intensity of the light having the second spectrum, are then sensed. From the sensed intensities of the lights having the first and second spectrums, an intensity of light having a third spectrum is estimated.
US07671985B1
The present invention is an optical device for small spot analysis by diffuse reflectance using fiber optic interfaced spectrometers. The device comprises a source of electromagnetic radiation and a set of mirrors designed to project most of the radiation from the said source onto a less than 1 mm diameter spot on the sample, collect a portion of the radiation reflected by the sample and refocus this reflected radiation into an optical fiber. The said optical fiber then brings the said reflected radiation into a fiber optic interfaced spectrometer for spectral analysis. A means for the magnified viewing of the sample and the precise selection of the sampling spot for analysis is integrated into the invented device. Adding a digital camera and a laser module to the said device enables nearly simultaneous multimodal analysis of the same sampling spot by diffuse reflectance, Raman, and fluorescence spectroscopy and by image analysis.
US07671978B2
A scatterometer-interferometer and method for detecting and distinguishing characteristics of surface artifacts provides improved artifact detection and increased scanning speed in interferometric measurement systems. A scatterometer and interferometer are combined in a single measurement head and may have overlapping, concentric or separate measurement spots. Interferometric sampling of a surface under measurement may be initiated in response to detection of a surface artifact by the scatterometer, so that continuous scanning of the surface under measurement can be performed until further information about the size and/or height of the artifact is needed.
US07671973B2
The present invention provides an optical analysis system for determining an amplitude of a principal component of an optical signal. The principal component is indicative of the concentration of a particular compound or various compounds of a substance that is subject to spectroscopic analysis. The optical signal is subject to wavelength selective weighting and wavelength selective spatial separation specified by a weighting function. The optical signal is preferably separated into two parts that corresponding to a positive and negative spectral band of the weighting function, respectively. The separation provides separate detection of the separated parts of the optical signal without significant loss of intensity, thereby providing an improved signal to noise ratio of the determined principal component. Separation and weighting of the optical signal is realized by two multivariate optical elements.
US07671972B2
A method of sensing movement or proximity of objects by optical reflection is provided. The method includes the steps of transmitting a train of optical pulses towards a destination, sensing optical pulses reflected from the destination, and sensing and evaluating movement or proximity characteristics of objects at the destination with reference to variation in pulse width between transmitted and reflected optical pulses.
US07671971B2
The invention relates to an electro-optical distance measuring method wherein frequency-modulated optical radiation is emitted onto at least one target to be measured. Once the radiation back-scattered to the target is received, the chirp of radiation is modeled by means of a phase function Φ(t) having parameters cj, thereby making description of the deviation of the chirp from the linear profile possible. The parameters used for description are at least partially determined from measurements or are coestimated during numerical signal processing.
US07671958B2
A liquid crystal device includes a first substrate, a second substrate, liquid crystal, a switching element, a signal wiring, a planarizing film, a first electrode, an electrode insulating film, a second electrode, and a terminal. The terminal is provided at least in a portion of a region on the first substrate in which the planarizing film is not formed. The terminal includes a terminal body portion, a terminal insulating film, and a terminal electrode portion. The terminal body portion is made of the same material as that of the signal wiring. The terminal insulating film is made of the same material as that of the electrode insulating film. The terminal electrode portion is made of the same material as that of the second electrode. The terminal electrode portion is electrically connected to the terminal body portion through the opening region.
US07671948B2
A liquid crystal device includes a first substrate, a second substrate disposed to face the first substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate, a first optical compensation plate fixed to the first substrate, a second optical compensation plate disposed at a side of the first substrate or the second substrate, and a pivot mechanism supporting the second optical compensation plate to be pivotable around an optical axis of light passing through the first substrate and the second substrate.
US07671942B2
Provided is a transflective LCD device that can selectively use a reflect mode and a transmit mode in a VA mode LCD device having a multiple domain. The transflective LCD device includes: gate lines and data lines arranged to cross each other on a first substrate to define a pixel regions having a reflection portion and a transmission portion; thin film transistors located at each crossing of the gate lines and the data lines, wherein the thin film transistors include a gate electrode, a semiconductor layer, and source/drain electrodes; a transparent electrode connected to the thin film transistor and located in the transmission portion; a reflective electrode connected to the thin film transistor and located in the reflection portion; a connection electrode that electrically connects the transparent electrode with the reflective electrode; a first storage electrode located in the reflection portion and a second storage electrode under the connection electrode; a second substrate facing the first substrate; and a liquid crystal layer interposed between the first and second substrates.
US07671938B2
The invention relates to a transflective liquid crystal display (LCD) comprising a patterned quarter wave foil (QWF) and having improved chromaticity.
US07671937B2
A polarizing plate comprising (a) a layer composed of a plurality of polyvinyl alcohol fibers adsorbing a dichroic pigment and having an aspect ratio of 10 or more, which are arranged in a planar form in one direction, or the above layer (a) and (b) a layer composed of a plurality of fibers having an aspect ratio of 10 or more and a difference between the refractive index of fiber in long axis and the refractive index of fiber in short axis of 0.05 or more and not adsorbing a dichroic pigment, which are arranged in a planar form in one direction, and/or (b′) a plurality of fibers having an aspect ratio of 10 or more and a difference between the refractive index of fiber in long axis and the refractive index of fiber in short axis of less than 0.05 and not adsorbing a dichroic pigment, which are arranged in a planar form in one direction, and (c) an optically transparent resin.,
US07671934B2
According to one embodiment, a display device includes a display module and a stand having a tilt mechanism which adjusts an upright angle of the display module. The tilt mechanism includes a fixed portion provided on the stand, a movable portion provided on the display module, a hinge shaft which pivotably couples the fixed portion and the movable portion together, and a lock member which limits pivoting of the movable portion with respect to the fixed portion. The lock member is movable between a lock position where the lock member engages with the movable portion so as to prevent the display module from falling down through at least a predetermined angle and a release position where the lock member leaves the movable portion so as to allow the display module to pivot freely.
US07671931B2
A liquid crystal display device includes a plurality of data lines arranged along a first direction on a substrate, a plurality of gate lines arranged a second direction perpendicular to the first direction on the substrate to define a plurality of pixel regions, each of the gate lines having at least one first set of protrusions and depressions, a driving device within each of the pixel regions, a pixel electrode within each of the pixel regions, and a metal layer overlapping each of the gate lines to create a storage capacitor.
US07671922B2
A unique method for chroma vertical upsampling used, for example, for conversion of the “4:2:0” format chroma information used in many applications of digital video, to the “4:2:2” or “4:4:4” format, is presented. This conversion is required so that video encoders can effect the display of this chroma information with a minimum of visible artifacts. The present invention carries out chroma vertical upsampling on a pixel by pixel basis. This chroma vertical upsampling is performed as a function of the amount of motion associated with each pixel as detected between 2 or more fields, and the field, frame and progressive sequence characteristics of the incoming video signal data.
US07671919B2
First to fourth lenses are aligned in an optical axis direction by a lens-barrel of a camera, an O-ring is disposed between the first lens and the lens-barrel, an O-ring is disposed between the fourth lens and the lens-barrel, a space is formed between the first and second lenses, a space is formed between the second and fourth lenses, a space is formed between the third and fourth lenses, and flow of air between the spaces is precluded. The camera thus configured is free of dewing on the lens or a protective plate exposed to the exterior, even when the inside temperature is raised due to heat generation in a CCD or a mounting substrate on which the CCD is mounted.
US07671913B2
A circuit for converting the format of image data, the motion of the image data being smooth, includes a memory (16) to which moving image data in the NTSC format is written; a memory controller (14) retrieving respective signals, from the memory (16), required for producing image data of an odd field and an even field in the PAL format; line-interpolating circuits (73) and (74) converting retrieved image data into first image data and second image, respectively, both image data having the line frequency of the PAL format; a frame-interpolating circuit (75) outputting the image data of the odd field in the PAL format by mixing image data of the odd field of the first image data and image data of the odd field of the second image data at a predetermined mixing ratio, and outputting the image data of the even field in the PAL format by mixing image data of the even field of the first image data and image data of the even field of the second image data at a predetermined mixing ratio; and a coefficient-generating circuit (77) changing the mixing ratios every field period in the PAL format.
US07671909B2
Provided are a method and apparatus for processing a Bayer pattern digital color video signal, where the video signal processing apparatus includes a BP detector that generates the pixel information signal PIS representing whether the current pixel is good or bad from the input video data based on the difference between the current pixel data and neighbor pixel data, and an interpolator that interpolates the bad pixel using neighbor pixel data in response to the pixel information signal.
US07671894B2
A method processes a multiview videos of a scene, in which each video is acquired by a corresponding camera arranged at a particular pose, and in which a view of each camera overlaps with the view of at least one other camera. Side information for synthesizing a particular view of the multiview video is obtained in either an encoder or decoder. A synthesized multiview video is synthesized from the multiview videos and the side information. A reference picture list is maintained for each current frame of each of the multiview videos, the reference picture indexes temporal reference pictures and spatial reference pictures of the acquired multiview videos and the synthesized reference pictures of the synthesized multiview video. Each current frame of the multiview videos is predicted according to reference pictures indexed by the associated reference picture list with a skip mode and a direct mode, whereby the side information is inferred from the synthesized reference picture.
US07671889B2
An autostereoscopic display system wherein an interdigitated stereogram is generated and displayed on an electronic display. The display includes a lenticular screen over the surface of the display which allows the user to observe the stereogram on the display and obtain a true stereoscopic effect. In accord with the invention, the resolution of master images is minimized and then the pixels from the master images are mapped to form the interdigitated stereogram. The optimum minimization of the resolution is obtained when the ratio of horizontal resolution to vertical resolution for the master images approximates the screen aspect ratio of the display. In this way, less computation is involved in remapping the pixels to form an interdigitated stereogram.
US07671884B2
A rotary drive apparatus includes a rotary body with a support portion, a rotor magnet supported by the support portion of the rotary body, a fixation section facing the rotor magnet and rotatably supporting the rotary body, and a winding coil provided in the fixation section, in which an expression E1/E2≦0.75 is satisfied where Young's modulus of the rotor magnet is E1 [GPa], and Young's modulus of the support portion is E2 [GPa].
US07671876B2
A resolution scaler of the present invention uses a shift adder instead of a multiplier for scaling an input resolution. The resolution scaler is provided with a counter controller and a pixel scaler. The counter controller outputs a weight to the pixel scaler. The pixel scaler includes a first shift adder for outputting the first shift value by adding a plurality of first shift arguments generated by shifting the current pixel data, a second shift adder for outputting the second shift value by adding a plurality of second shift arguments generated by shifting the previous pixel data, and an adder for outputting the scaled pixel data by adding the first shift value and the second shift value.
US07671874B2
A database methodology that concerns the mapping of any arbitrary object into a plurality of regions, enabling the assignment of multiple region-specific attributes thereto and facilitating the concurrent, graphical presentation of any assigned attributes. Attribute storage, manipulation, and presentation are driven by the individual regions and characteristics of the object.
US07671866B2
A memory controller having graphic processing function that includes a graphic processing unit operating in response to a selection signal from a master, and a memory interface for storing outputs of the graphic processing unit in an external memory at and receiving graphic data from the external memory to provide the graphic data to the graphic processing unit.
US07671864B2
Methods and machines which increase image processing performance by efficiently copying image data from input memory to main memory before performing CPU intensive operations, such as image enhancement, compression, or encryption, and by efficiently copying image data from main memory to output memory after performing CPU intensive operations, such as decryption, decompression, image enhancement, or reformatting.
US07671860B2
Compact and accurate piecewise parametric representations of implicit curves may be achieved by iteratively selecting ranges of parameterizing regions and testing each for satisfying an intervalized super convergence test. In one aspect, the implicit curves is represented as a compact form of one or more representations of such convergence regions. For memory and bandwidth constrained applications, starting points of convergence regions may not be stored but instead calculated at runtime prior to rendering a point on the implicit curve. Furthermore, not all endpoints relevant convergence regions of a selected implicit curve need be stored. Instead, based on at least one endpoint, the other endpoints can be derived via Newton iterations. To further reduce memory and bandwidth costs, coordinates can be stored in a quantized format and the points reflecting floating point accuracy can be derived at runtime again by Newton iteration.
US07671859B2
An instrument display includes a light source that selectively emits light and a light guide that receives the light. One or more optical coating layers are disposed on the light guide. The light guide has a first index of refraction, and the optical coating layer or layers have a second index of refraction that is greater than the first index of refraction of the light guide. The optical coating layer or layers reduce glare from ambient light and increase the light transmitting performance of the light guide.
US07671858B1
Computer software for and a method of generating a conformal all quadrilateral or hexahedral mesh comprising selecting an object with unmeshed boundaries and performing the following while unmeshed voids are larger than twice a desired element size and unrecognizable as either a midpoint subdividable or pave-and-sweepable polyhedra: selecting a front to advance; based on sizes of fronts and angles with adjacent fronts, determining which adjacent fronts should be advanced with the selected front; advancing the fronts; detecting proximities with other nearby fronts; resolving any found proximities; forming quadrilaterals or unconstrained columns of hexahedra where two layers cross; and establishing hexahedral elements where three layers cross.
US07671856B2
A unique test pattern is used for measuring timing parameters of RGBHV analog video signals. For horizontal timing a horizontal line includes within an active video region left and right portions at a first level and a central portion at a second level, the left, right and central portions having a defined percentage relationship to the number of pixels of the horizontal line within the active video region. Also optionally included are left and right border portions just prior to and just after the left and right portions respectively. Measurements are done in pixels for the horizontal line from a horizontal sync pulse to each transition of the unique test pattern, and the horizontal timing parameters are derived from such measurements. Likewise for vertical timing a frame includes within the active video region top and bottom portions made up of horizontal lines having a first level for a first half and a second level for the second half, the number of lines in the top and bottom portions having a defined percentage relationship to the number of lines in the active video region. Also optionally included are top and bottom border lines just prior to and just after the top and bottom portions respectively. Measurements are done in lines for the frame from a vertical sync pulse to each transition in line pattern of the unique test pattern, and the vertical timing parameters are derived from such measurements.
US07671853B2
A signal output adjustment circuit includes a decoder which decodes command data from a memory, a control register in which control data corresponding to first command data is set when the decoder determines that the command data is the first command data, a buffer in which the control data corresponding to second command data is stored when the decoder determines that the command data is the second command data, and an output adjustment circuit which reads the control data stored in the buffer and outputs the control data in synchronization with a data fetch signal, based on a value set in the control register. At least one of permission/rejection of inversion output of the data fetch signal and output timing of the data fetch signal is set based on the value set in the control register.
US07671849B2
The present invention relates to organic conductive polymer compositions adapted to produce touch panel input devices that hardly undergo resistance degradation even after prolonged and repeated usages, and represent remarkably improved reliability and lifetime in particular. The organic conductive polymer compositions according to the present invention comprise a thiophene derivative polymer, a water-soluble organic compound (except for nitrogen-containing compounds), and a dopant, wherein the thiophene derivative polymer is expressed by the formula (1).
US07671839B2
A computing device is provided that includes a display comprising a plurality of discrete elements. A memory is used to store a data collection of paginated content. A processor of the computing device is configured to retrieve each of the pages from the memory. The processor signals the display to individually present each of the pages. A sensor device is coupled to the processor. The sensor device is deflectable to signal the processor a deflection value that causes the processor to sequentially present at least portions of multiple pages on the display.
US07671835B2
In an image display apparatus and image display method suppress the degradation of display function and the shortening of service life due to long-term use, measurement of a current value is carried out and the measured current value each time a certain time elapses is stored. The integrated value of the current is calculated, and a comparator compares the integrated value with a reference value stored in a storage section for determining whether or not the result is greater than a prescribed value. If the result is affirmed to differ by prescribed value, a recovery voltage is applied, and it is determined whether or not a recovery time has exceeded a stored recovery time. If the excedance of the recovery time is affirmed, the application of the recovery voltage is terminated. If a negation is given at the determination of the greater difference value, the flow is ended. If a negation is given at the determination of the recovery time, the recovery voltage is applied.
US07671834B2
An electric writable medium having islanded surface structures operationally configured to avoid tribocharging of the electric writable medium.
US07671824B2
A plasma display panel for adaptively reducing load effect and improving luminescence efficiency and discharge efficiency, and a driving method thereof. A plasma display panel includes a capacitive load; a source capacitor; a sustain voltage source to generate a sustain voltage; a first inductor formed on a first current path where a current flows from the capacitive load to the source capacitor; a second inductor formed on a second current path where a current flows from the source capacitor to the capacitive load; a switch configuration and switch control circuit that controls the switching operations of the switch configuration such that at least two discharges may occur during one sustain pulse cycle.
US07671823B2
Multi-angle mirror methods and related systems.
US07671822B2
The invention is directed to an optical unit for a head-up display comprising an image generator, a mirror and a cover plate which are arranged in a housing one behind the other in the direction of light propagation. The beam path is directed to a windshield. The invention is wherein that the mirror is a rear-surface mirror whose reflection surface has a light-bundling action. The rear-surface mirror has, in addition, a refractive action that can be generated by the refractive index of the mirror material and a material thickness which changes between the reflection surface and the transmissive surface.
US07671814B2
An embedded antenna for facilitating wireless transmission of utility meter data is disclosed, where in one embodiment an RF antenna is a part of the faceplate of the utility meter. In another embodiment the utility meter faceplate is a single-layer or a multi-layer printed circuit board (PCB) with the RF antenna printed on any desired layer. Such faceplates may be labeled to be viewable from outside of the meter housing and/or have openings to accommodate visual access to an output display of the meter consumption information.
US07671805B2
According to an aspect of the invention, there is provide an antenna apparatus including: a conductive element including one end connected to a ground plane via a terminating resistor and the other end to which a power is supplied; and at least one branch conductive element branching from the conductive element and having a tip end which is short-circuited to the ground plane, and an element length of the branch conductive element being approximately a quarter wavelength of an operation frequency.
US07671798B2
A method and system for optimally combining noisy measurements of attributes to obtain a composite statistically useful attribute result is disclosed. The method includes measuring a signal to noise ratio for each carrier in a pair, computing a signal to noise ratio power which is derived from said signal to noise ratio of each carrier in the pair and adding said signal to noise ratio powers that have been received within a predetermined period of time until the sum of said signal to noise ratio powers reaches a first threshold. The method continues with computing a weight based on the percentage of each measurements signal to noise ratio power in relation to said sum of said signal to noise ratio powers and deriving a statistically useful attribute result based at least in part on said weight of each signal to noise ratio power.
US07671796B2
A method for searching satellites is disclosed. In the method of the present invention, the satellites are selected to consist of a group, and searching is conducted in this group. The group size is predetermined for each stage so as to be the most appropriate for various searching conditions. The member number of the group (i.e. group size) and the members of the group are updated as the searching results are continually obtained. The updates are done according to scanning times of the group, satellite hit number, searching time for the group and satellite priorities and the like, for example. The group size can be reduced or expanded. By using the method, satellites required to fix a position can be rapidly found.
US07671789B1
A method for target detection and angle estimation in a radar system includes receiving a signal from a radar array; based on the received signal, performing monopulse beamforming to obtain one or more monopulse beams; based on the monopulse beams, determining monopulse ratios; using maximum likelihood estimation based on the determined monopulse ratios to determine a monopulse ratio estimate corresponding to a maximum of a likelihood function; accessing a table correlating monopulse ratio estimates and target angle values and determining from the table an estimated target angle; accessing a complex target amplitude corresponding to the estimated target angle, comparing the complex target amplitude to a threshold; and if, based on the step of comparing, the target amplitude exceeds the threshold, providing an output signal indicative of target detection and the estimated target angle.
US07671778B2
In a cable return path system, a method for performing digital companding adds a predetermined offset to the digital value to be companded, and employs a modified μ-law or a-law companding technique to obtain a reduced bit length digital value. One embodiment of this modified approach adds a predetermined offset (e.g., 129 for a 12-bit implementation) to the digital value before companding and then employs a two-bit chord and a 5-bit step for the 12-bit implementation. The end result is that the performance metrics are not significantly compromised by this bit reduction when compared to current transmission methods without this technique.
US07671769B2
A multistage analog/digital converter for converting in multi-step cycles an input signal into respective digital codes, each cycle step resolving at least one bit of a respective digital code. The converter includes: a sampling circuit inputting the signal and outputting a first sequence of analog samples; a generation block of a pseudorandom sequence of samples; a summing node, such as to input the first sequence and the pseudorandom sequence, obtaining in output a second sequence of analog samples including non-pseudorandom samples; a converter having a controllable digital gain receiving the second sequence and outputting bits of the digital codes; a feedback loop with a loop gain and including an analog amplifier; a digital calibration block to match the digital gain to the loop gain and including a prediction block to produce a digital estimation of said input signal starting from the bits resulting from converting the non-pseudorandom samples.
US07671768B2
The invention relates to an N-bit digital-to-analogue converter (DAC) system, comprising—a DAC unit comprising an N-bit master DAC and a slave DAC, yielding a master DAC unit output signal and a slave DAC unit output signal, respectively, said N-bit master DAC having an output step size,—an adder unit combining the master DAC unit output signal and the slave DAC unit output signal, and—a means for storing correction values for at least the master DAC, said correction values being used by the slave DAC, whereby the DAC system is arranged for master DAC output corrections with a size in absolute value higher than half of the output step size.
US07671766B2
Data coding and entropy coding are performed with interconnection, and grouping is used to enhance coding efficiency. The present invention includes the steps of hierarchically extracting identification information indicating at least three or more data coding schemes. The identification information indicating two coding schemes having high frequencies of use for the identification information are extracted from different layers.
US07671765B2
Systems and methods for input of text symbols into an electronic device comprising a reduced keyboard having keys representing a plurality of characters are disclosed. Possible symbol variants are identified based on character inputs received from the reduced keyboard. Each identified symbol variant is grouped into one of a plurality of groups of symbol variants, each group having an associated priority, according to a type of the symbol variant. Within at least one of the groups, the symbol variants are ranked in decreasing order of frequencies of use of the symbol variants. A list of symbol variants comprising the plurality of groups of symbol variants in order of decreasing priority is then displayed, and an input symbol is selected from the list of symbol variants. The symbol variants of the at least one of the groups of symbol variants are thereby sorted by both priority and frequency of use.
US07671763B1
A vehicle locator system is disclosed. An illustrative embodiment of the vehicle locator system includes a vehicle locator/charging unit having a unit microprocessor, a first cell phone circuitry and a first GPS and or RF circuitry connected to the unit microprocessor, a charge plug and a charge port connected to the charge plug; and a cell phone having a cell phone microprocessor, a second cell phone circuitry, a second GPS and or RF circuitry and a display connected to the cell phone microprocessor and a charge port adapted for connection to the charge port of the vehicle locator/charging unit.
US07671752B2
An alcohol monitoring system for monitoring a driver of a car includes a vapor analyzer system for detecting the amount of alcohol in a driver operating the car. A speed controller is provided for setting the maximum speed of the car to a predetermined level in the event that the amount of alcohol detected in the driver is above a predetermined threshold. A cell phone is configured to automatically call a remote call center, in the event that the amount of the alcohol detected in the driver is above the predetermined threshold. Furthermore, a location system is configured to provide the location of the car to said remote call center. A mapping database in said remote call center is configured to provide nearest resting locations to said car so as to guide the driver to drive the car to any one of said locations.
US07671747B2
If the frequency of the electric waves used at a pre-designated inspection site is known frequency, the antenna seal connected to a base antenna is peeled off, in part or entirety. Thus, the resonance frequency is easily and correctly adjusted to the frequency known.
US07671737B2
The disclosure relates to monitoring and notification apparatus capable of monitoring events at various locations. The apparatus includes a sound receiving unit which receives audio content from various locations. A user can select which of the location is monitored at any one time. In one embodiment, this selection is made depending on the orientation of the sound receiving unit.
US07671735B2
A device and method for accessing, monitoring, and controlling home appliances in a media exchange network by establishing a communication link between a communication initiation device and at least one home appliance and communicating at least one command from the communication initiation device to the at least one home appliance via the communication link. The at least one home appliance then generates at least one response to the at least one command. The commands may include turning the home appliance(s) on and off, parameter adjustment commands, access commands, monitoring commands, mode change commands, and programming commands. Appliance responses may include powering on, powering off, changing a mode of operation, sending a status to the communication initiation device, adjusting an operational parameter, and changing a programmed operational step.
US07671726B2
A wheel position detecting apparatus comprises transmitters, a triggering device, and a receiver. The transmitters are attached to the plurality of wheels respectively. Each transmitter transmits a frame responsively to a triggering signal from the triggering device. The frame includes data indicating a reception intensity of the triggering signal. The triggering device is disposed in a vehicle body and outputs the triggering signal toward the transmitters attached to the plurality of wheels. This triggering device is positioned nearest to a specified wheel among the plurality of wheels to which the triggering signal is outputted, the specified wheel being influenced most heavily by noise generated in the vehicle. The receiver, disposed to the vehicle body, receives the frame and uses the data indicating the reception intensity of the triggering signal to detect positions of the wheels by determining which transmitter is attached to which wheel.
US07671719B2
An electronic storage box, an electronic storage box opening and closing method, and computer program product, comprising: safety, portability, convenience, economical efficiency and presentation effects are provided. In case a cryptograph setting request signal is received from a PC 21, the electronic storage box 1 stores cryptograph information included in the cryptograph setting request signal. In case an opening and closing request signal is received from a PC 21, the electronic storage box 1 determines whether or not the cryptograph information included in the opening and closing request signal and the cryptograph information stored in a key storage portion 103 match with each other. In case it is determined that these pieces of the cryptograph information match with each other, the electronic storage box 1 allows a lid 12 to shift either to an opened state or a closed state according to the opening and closing state of the lid 12.
US07671716B2
An inductive module includes an electrically insulating basic substrate unit having opposite first and second trace-forming sides, a ferromagnetic core unit embedded in the basic substrate unit and having horizontal sides substantially parallel to and respectively spaced apart from the first and second trace-forming sides, and a coil unit. The coil unit includes first and second conductive vias respectively formed in the basic substrate unit adjacent to vertical sides of the core unit, and respectively spaced apart from the vertical sides, and first and second conductive traces, each of which is disposed on a corresponding one of the first and second trace-forming sides, and interconnects electrically a corresponding pair of the first and second conductive vias. The conductive traces and the conductive vias of the coil unit cooperate to form an electric current path that substantially winds around the core unit.
US07671711B2
A remote operation includes an electromagnetic linear actuator that has a moving part linked to a handle of a circuit breaker, and drives the handle according to a remote operation command to perform change-over operations on the handle to ON, OFF, and RESET positions. The electromagnetic linear actuator is composed of permanent magnet type linear pulse motors each including a field section having a plurality of permanent magnets arranged in a row and a coil section having a three-leg type magnetic yoke and actuation coils wound around the legs of the magnetic yoke and opposing the field section. Electric current in the actuation coils is controlled by sequentially changing-over excitation patterns during the operation process, and the moving part is driven in a stepwise motion to drive the handle of the circuit breaker to the end position of the changeover operation process.
US07671701B2
A transmit and receive circuit for use in power line communication devices is provided. One embodiment of the circuit includes a receive channel with a first delay circuit coupled to a first switch having an open configuration and a closed configuration a first switch. The circuit also may include a transmit channel coupled to the receive channel at a node and including a second delay circuit coupled to a second switch having an open configuration and a closed configuration. When the switch of either channel is closed, the switch of the other channel is open. Data signals traversing either channel when that channel's switch is closed, are phase shifted approximately three hundred and sixty degrees and conducted back to the node.
US07671699B2
Various directional coupler arrangements are disclosed. For instance, an apparatus includes first, second, and third conductive patterns disposed on a substrate. Each of these conductive patterns includes a first end and an opposite second end. Moreover, each of these conductive patterns includes a first protrusion at its first end and a second protrusion at its second end.
US07671696B1
A multilayer circuit board assembly includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the circuit board assembly. The RF interconnects can include one or more RF matching pads which provide a mechanism for matching impedance characteristics of RF stubs to provide the RF interconnects having desired insertion loss and impedance characteristics over a desired RF operating frequency band. The RF matching pads allow the manufacture of circuit boards having RF interconnects without the need to perform any back drill and back fill operation to remove stub portions of the RF interconnects in the multilayer circuit board assembly.
US07671695B2
A parallel coupled CPW line filter is provided, including a first and a second coupled lines arranged on one side of an insulating body and connected in parallel with each other, and a ground arranged on the same plane as the first and the second coupled lines, comprising a pair of ground parts spaced apart from the first and the second coupled lines, respectively, the ground parts each comprising recesses sunken from areas close to the first and the second coupled lines.
US07671690B2
In one embodiment, a signal control system has a signal output and includes: 1) a phase-locked loop (PLL) having a voltage-controlled oscillator (VCO), a phase error detector, an oscillating output coupled to the signal output of the signal control system, and a programmable frequency divider coupled in a feedback path between the oscillating output and the phase error detector; 2) at least one automatic level controller (ALC), coupled to the oscillating output; and 3) a plurality of switchable integrators, including first and second switchable integrators that are respectively coupled between the phase error detector and the VCO, and in the at least one ALC. Each of the switchable integrators is switchable between a narrow bandwidth mode that provides for stable operation of the signal control system, and a wide bandwidth mode that enables fast signal transitions at the signal output.
US07671689B2
A FET transistor voltage-controlled oscillator is provided that includes a crossed-coupled inductor capacitor tank (LC-Tank) transistor voltage-controlled circuit having a first transistor and a second transistor, as well as a transistor frequency multiplying circuit having a third transistor and a fourth transistor. In the design, the gate of the first transistor is connected to the drain of the second transistor, and the gate of the second transistor is connected to the drain of the first transistor. Then, the source of the third transistor is connected to the source of the first transistor, and the source of the fourth transistor is connected to the source of the second transistor. Last, the gate of the third transistor is connected to the gate of the fourth transistor, and the drain of the third transistor is connected to the drain of the fourth transistor. Therefore, the parasitic capacitance present in the first transistor and the parasitic capacitance present in the second transistor generate an effect similar to two capacitors connected in series, via the transistor frequency multiplying circuit. The effect reduces the total capacitance of the voltage-controlled oscillator, to increase the working frequency of the voltage-controlled circuit and allow a circuit having the voltage-controlled circuit to operate at a high frequency.
US07671686B2
A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.
US07671676B2
A continuous time common mode feedback module is capable of operating in a wide range of input voltages. The common mode feedback module includes a common mode detector and an amplifier for computing and amplifying the difference of a reference voltage and a common mode voltage of a first input signal and a second input signal. The common-mode feedback module includes a common mode resolver and a control voltage generating module coupled to each other to provide a common mode feedback voltage. The common mode feedback module provides a good linearity and a wide bandwidth, without compensation requirements. The common mode feedback module also provides small process corner dependence of bias current and a common mode offset.
US07671674B2
The present invention relates to an amplifier circuit and system, and to a method of compensating a gain imbalance generated in a complementary amplifier stage with first and second amplifier means (22, 24) in a bridge configuration. A compensation offset current is generated in response to the values of input signals supplied to respective inputs of said first and second amplifier means, and the compensation offset current is injected to a junction node between the inputs of the first and second amplifier means (22, 24). Thereby, it can be ensured that the gain of the first and second amplifier means does not depend on the kind of input signals, i.e. balanced or unbalanced input signals. An automatic gain correction can thus be achieved and the requirement of additional control signals or control terminals for selection of gain control circuits depending on the kind of input source or input configuration of the amplifier circuit can be dropped.
US07671669B2
A device and a method for reducing input noise providing at least a microcontroller. The microcontroller comprises: at least a noise reduction device, at least an analog switch and at least a signal output unit. The noise reduction device connected to the ground or a voltage is turned on to charge or discharge a stray capacitor existing on a turned off analog switch so that the amount of charge stored in the stray capacitor is zero or a specific value. Thereby, the noise in a touch switch is reduced and the cost of layout on the PCB is saved.
US07671661B2
Provided are an IC and a method for automatically tuning process and temperature variations. The IC includes: a test circuit unit including test circuit elements having identical element values and variations to a tuning-targeted circuit element and at least one reference circuit element having a smaller variation than the tuning-targeted circuit element; a comparator that obtains a difference between intensities of first and second signals detected from the test circuit unit; and a tuning unit that tunes the variation of the tuning-targeted circuit element according to the difference between the intensities of the first and second signals. Thus, process and temperature variations of a circuit element can be detected and accurately tuned with respect to the circuit element itself. Also, the process and temperature variations can be tuned inside an IC. Thus, the time required for tuning the process and temperature variations can be reduced.
US07671658B2
A mixer which has an enhanced frequency selection characteristic and generates no pass loss is realized without using an operation control signal having a frequency higher than a sampling frequency. Provided are a time control section 102 for supplying control signals, a first switched capacitor circuit 100 for outputting a discrete time sample stream of the input signal 107 in accordance with integration operation control signals Lo1 and Lo2, and a second switched capacitor circuit 104 functioning as a high-order IIR filter by sharing a charge, and a frequency of each of the integration operation control signals Lo1 and Lo2 is higher than frequencies of other control signals.
US07671656B2
A level shifter in which short circuit current and the increase in delay are reduced when a first power source is controlled. In a level shifter for converting a signal level of a first logic circuit to which a first power source is supplied into a signal level of a second logic circuit to which a second power source is supplied, the circuit includes a switching circuit between a GND power source terminal of a level shift core circuit and a GND power source. The switching circuit is controlled by a third logic circuit which generates a control signal under control of the first power source, and a pull-up/pull-down circuit at an output of the level shift core circuit. The pull-up and/or pull-down circuit is controlled by the third logic circuit.
US07671655B2
A level conversion circuit includes a high-potential-side level conversion unit which is connected between a first high-voltage power supply and a first low-voltage power supply, and converts a high-potential-side voltage of an input signal, a low-potential-side level conversion unit which is connected between a second high-voltage power supply with a lower voltage than the first high-voltage power supply and a second low-voltage power supply with a lower voltage than the first low-voltage power supply, and converts a low-potential-side voltage of the input signal, and an output unit to which an output of the high-potential-side level conversion unit and an output of the low-potential-side level conversion unit are input, and which outputs a voltage level of the first high-voltage power supply and a voltage level of the second low-voltage power supply.
US07671652B2
A logic circuit is provided with a first differential transistor pair (Q1, Q2) operable in response to a data signal input thereto; a current source for supplying a current to the first differential transistor pair (Q1, Q2); a first transistor (Q5) connected between a common emitter of the first differential transistor pair (Q1, Q2) and the current source, and operable in response to a clock signal input thereto; and a first potential stabilizing circuit (30a) connected to a first junction between the common emitter of the first differential transistor pair (Q1, Q2) and a collector of the first transistor (Q5), for stabilizing a potential at said first junction.
US07671651B2
A duty cycle correction circuit and a delay locked loop (DLL) including the duty cycle correction circuit, are capable of controlling their operation in order to correctly analyze the cause of generation of a duty cycle error when the duty cycle error is generated in the DLL. The duty cycle correction circuit selectively outputs to a DLL core duty cycle offset information for controlling a duty cycle of an internal clock signal synchronized to an external clock signal under the control of a switching control signal. The DLL corrects the duty cycle of a reference clock signal according to the duty cycle offset information, thereby outputting a reference clock signal having a 50% duty cycle.
US07671648B2
A clock generator having a delay locked loop and a delay control circuit. The delay locked loop receives an input clock signal and adjusts an adjustable delay circuit to generate an output clock signal that is synchronized with received input clock signal. The delay control circuit coupled to the delay locked loop generates a control signal to initialize the delay measure operation to adjust the adjustable delay circuit, after comparing the phase difference of the input clock signal and the output clock signal. The delay control circuit further generates a start measure control signal to start measuring a delay applied to the measurement signal propagating through the adjustable delay circuit, and generates a stop measure control signal to stop the delay measurement of the measurement signal. The delay adjustment of the delay locked loop is then adjusted to apply the delay measurement when synchronizing the input and output clock signals.
US07671643B2
A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from the output circuitry is also provided to the integrated circuit to which the POR circuit is coupled. The state machine includes a plurality of sequential circuits such as latches, flip-flops, and the like that are electrically coupled in a cascade, to provide a ripple counter. The output circuitry is structured and arranged to reset or initialize all of the logic elements on the chip by generating a POR output logic HI (1) signal by Boolean operation of the logic circuitry signal of the state machine for all Boolean states except one. The oscillator is disabled when the POR output logic signal is LO (0), which causes the POR circuit to enter a zero or substantially zero current state.
US07671640B2
A direct injection-locked frequency divider circuit with inductive-coupling feedback architecture is proposed, which is designed for integration to a high-frequency circuit system with a high operating frequency such as 24 GHz (gigahertz), for providing a frequency-dividing function. The proposed frequency divider circuit comprises an injection-locked oscillator (ILO) circuit module and a pair of buffer-stage circuits, wherein the ILO circuit module further includes a signal-injection circuit, a cross-coupled switching circuit, and a variable-capacitance tuning circuit. The proposed circuit architecture is characterized by the circuit arrangement of a direct-injection architecture and an inductive-coupling feedback architecture by coupling the inductive elements of the buffer-stage circuits to the inductive elements of the variable-capacitance tuning circuit in the ILO circuit module. These features allow the proposed frequency divider circuit to have higher operating frequency with wider frequency locking range, low power consumption, and small integrated circuit layout area.
US07671637B2
The invention relates to current switches using a differential pair of transistors and being able to operate under a low supply voltage Vcc. According to the invention, provision is made for the current switch to include two differential pairs of two transistors each (T1, T1b; T2, T2b), cascaded together, the second pair (T2, T2b) having complementary current outputs (H, Hb) that flip according to the states of the inputs (E, Eb). The first pair (T1, T1b) is connected to a ground (GND) through a current source, supplying a current of value Io and comprising a transistor (Ts1) biased by a voltage Vbias, and it is supplied by a voltage equal to N·Vbe+Vbias, where N is a whole number (preferably equal to 1) and Vbe is the base-emitter voltage of the transistor (Ts1). The second pair (T2, T2b) is connected to ground directly through a resistance (R2). The invention can be applied to the on-off control of sample-and-hold circuits, multiplexers, fast low-voltage logic circuits, etc.
US07671631B2
A low voltage differential signal receiving device includes two differential receivers, two oversamplers, a phase locked loop, and a clock edge and data boundary detection & data extraction logic module. Clock and data signals are transmitted via channels having the same circuit layout, so that the clock signal is treated as another type of data signal. A frequency of sampling input clock and data is increased via asynchronous clock, clock transition is detected, and data bytes are extracted from clock and data samples. Therefore, the clock signal and the data signal have the same delay time to avoid any sampling error due to a difference in time sequence between the clock and the data. Meanwhile, due to the accurately increased sampling frequency, the sampled clock and the data signals are not adversely affected by different factors to enable upgraded data transmission efficiency and quality at the same time.
US07671623B2
A device is provided for managing the current consumption peak on each powering-up of a domain in an electronic circuit. A plurality of domains are present and a global power supply grid provides power. Each domain is selectively supplied by a local supply grid connected to the global supply grid via a plurality of commanded switch transistors. A pre-charge transistor is used to pre-charge a domain at powering-up. A command circuit controls operation of the switch transistors through an analog command signal whose slew rate is controlled to ensure that switch transistor conduction is delayed to enable the pre-charge circuit to charge the domain to a sufficient degree that activation of the switch transistor will not draw excessive current. A detection circuit is configured to compare the instant value of the supply voltage with a fixed reference supply voltage and/or to compare, with the value of a fixed command voltage, the instant value of the differential voltage between the global supply voltage and the command voltage.
US07671618B2
An integrated circuit (IC) comprises a plurality of analog stages (10a-c), each of the analog stages being conductively coupled to a power supply (20; 20a-c), and being conductively coupled to each other by a signal path (12); and a test arrangement for testing the plurality of analog stages, the test arrangement comprising input means such as an analog bus (40) coupled to a signal path input of each analog stage from the plurality of analog stages, output means such as a further analog bus (50) for communicating a test result to an output of the integrated circuit, switching means such as a plurality of switches (36) in the biasing infrastructure of the IC for selectively disabling an analog stage, and control means such a shift register (60) for controlling the switching means. Consequently, the analog stages of the IC can be tested and debugged in isolation without the need for switches in the signal path through the cores. A current sensor (70) may be present in the power supply to facilitate structural testing of the analog stages in isolation.
US07671606B2
A technique is disclosed for determining capacitive, inductive, and resistive components of power line impedance via a portable line impedance measurement system. The measurement system includes a circuit that switches a burden resistor between power line conductors to cause a droop in a voltage waveform. The voltage waveform is sampled prior to inclusion of the resistor in the circuit, as well as after to identify the droop. The short circuit between the power lines is then removed by opening the circuit and a first effective capacitance in the test circuitry causes a resonant ring due to the inductive component of the power line impedance. The process is repeated a second time with a second effective load capacitance enabled in the test circuitry to cause a second resonant ring. Based upon the frequency of the rings and the voltage measurements, the individual impedance components of power line impedance can be computed.
US07671596B2
A detector for locating metallic objects includes a transmit coil (116, 216) and at least two receive coils (112, 114; 212, 214), which are inductively coupled to one another; the at least two receive coils (112, 114; 212, 214) are located coaxial to one another in a plane (126, 226), and the transmit coil (116, 216) is located in a parallel plane with a height offset. Additional compensating windings (130, 132; 230, 232) of at least one of the receive coils (112, 114; 212, 214) are formed adjacent to a transmit coil (116, 216).
US07671586B2
An inspection system positions a balancing shim to asymmetrically balance a magnetic field generated by an inductive sensor, which forms part of the inspection system. Additionally, relays and capacitors used to tune the inductive sensor to a desired resonance frequency are geometrically arranged to minimize electrical interference generated by operation of the relays and capacitors. A shielding device, which may be formed on a printed circuit board, protects a magnetic field generated by the inductive sensor from external electromagnetic interference. A slot positioned in the inductive sensor may be used to tune a resonant mode of the inductive sensor to accurately and particularly detect metallic shanks and/or other metallic objects in shoes, socks, and/or clothing.
US07671583B2
A sensor element for a revolution counter includes a laminated structure suitable to cause a change in magnetisation in the sensor element without a power supply, simply by the displacement of a magnetic field past the sensor element. Moreover, the laminated structure is suitable for storing a plurality of such changes. The sensor element has a spiral structure.
US07671581B2
A magnetic pulse generator for measuring wheel revolutions of bicycles includes a magnet and an attachment device for attaching the magnet to a component (or spoke) of a wheel. Damage to the component to which attachment is to take place is to be prevented, and the installation expenditure during attachment is to be reduced. Furthermore, the magnetic pulse generator known from practical application is to be improved in that it is applicable to components of various geometric shapes, in particular to round components of various diameters and to flat components spokes of various widths. This object is met with an attachment device that includes a housing that encompasses the component, and that is formed as a longitudinally slit tubular piece. Ends of the housing forming the longitudinal slit can be connected to each other in a positive-locking and/or non-positive manner, and a spacing (A) therebetween is variable.
US07671575B1
A circuit for improving transient response for a load coupled to a voltage regulator by employing both load current level information and the regulator's output voltage to control a loop that provides relatively faster and accurate regulation of the regulator's output voltage. The circuit includes an error amplifier that is coupled to a reference voltage and feedback resistors connected to the regulator's output voltage. This error amplifier outputs a compensation signal that is subsequently summed at a summing point with additional information regarding the amount of current flowing through the load. Then, this summed compensation signal is subsequently employed by a pulse width modulation (PWM) comparator and other components to regulate the regulator's output voltage with improved speed and accuracy. The circuit can be arranged in different topologies, including buck, boost, and buck/boost.
US07671572B2
A voltage boost circuit and a method of boosting voltage using a voltage boost clock signal with varying frequency, in which the voltage boost circuit includes a boost voltage generator that responds to a voltage boost clock signal in order to boost an input voltage and outputs the boosted input voltage as an output boost voltage; and a boost voltage frequency control unit that responds to the result obtained by comparing a level of the output boost voltage and a level of a target boost voltage so as to change the boost voltage frequency of the voltage boost clock signal and outputs the voltage boost clock signal having the changed boost voltage frequency. The voltage boost circuit and the voltage boosting method can prevent a waste of the operating current during the boosting of the voltage.
US07671571B2
A method includes receiving an activation signal at a semiconductor device and generating an output power signal at the semiconductor device in response to receiving the activation signal. The output power signal has a duty cycle. The method also includes providing the output power signal to a load. The output power signal provides power to the load. An amount of power provided to the load is based on the duty cycle of the output power signal. In addition, the method includes adjusting the duty cycle of the output power signal using at least one of a current limiter and a power limiter integrated in the semiconductor device.
US07671566B2
A method for predicting remaining capacity of a battery includes: (a) determining an initial battery capacity; (b) measuring a second voltage; (c) calculating a maximum possible battery voltage and a minimum possible battery voltage according to the second voltage, a maximum possible battery current and a minimum possible battery current, and an internal resistance; (d) calculating a maximum possible battery remaining capacity and a minimum possible battery remaining capacity according to the maximum possible battery voltage, the minimum possible battery voltage, and the voltage-remaining capacity table; (e) comparing the maximum possible battery current with the minimum possible battery current; and (f) calculating a remaining capacity of the battery according to a comparison result in step (e), the maximum possible battery remaining capacity, and the minimum possible battery remaining capacity.
US07671560B2
In one embodiment, the present invention includes a method for performing a test on a rechargeable battery to indirectly determine a state of protection circuitry associated with the battery. The method may discharge the battery by controlling a pull-down current into a system, determine if the battery voltage falls below a first threshold level within a predetermined amount of time, and if so provide a pre-charge current to the battery.
US07671551B2
The invention teaches a brushless DC motor, comprising a brushless DC motor unit and a controller unit, wherein the brushless DC motor unit comprises a stator assembly, a permanent magnet rotor assembly magnetically coupled with the stator assembly, an enclosure supporting the installation of stator assembly and the permanent magnet rotator assembly, an end shield installed at the end of the enclosure, the rotating shaft of the permanent magnet rotor assembly projecting out of the end shield; the controller unit comprises an integrated power module, a microprocessor unit, a rotor position sensing circuit, a power source circuit, an I/O interface circuit, a current-sensing circuit, and a controller box; and the controller unit is electrically connected to the brushless DC motor unit. The brushless DC motor of the invention has an ideal control circuit with a plurality of control units serving to control the motor operation characteristics stored in the microprocessor unit so that the brushless DC motor is broadly universal and can be operated under a plurality of control modes.
US07671549B2
An AC motor speed controller includes a plurality of capacitors that may be selectively switched, by means of controllably conductive switches, into series electrical connection with an AC motor and an AC voltage source to control the speed of the motor. To change the speed of the motor, a control circuit renders a first switch conductive, in response to a first detected AC voltage zero crossing, to charge a first capacitor to a predetermined voltage. The control circuit then renders a second switch conductive, in response to a subsequent second detected AC voltage zero crossing, to charge a second capacitor to the predetermined voltage. The control circuit then renders both switches simultaneously conductive at a predetermined time after a subsequent third detected AC voltage zero crossing. The capacitors will thereby be charged to the same voltage prior to being switched into series with the motor, thereby resulting in reduced acoustic noise when changing motor speeds.
US07671547B2
A control system for determining a line pull of a winch. The system comprises a first sensor configured to measure a torque generated by the winch to retract a cable and a second sensor configured to measure a number of layers of the cable retracted by the winch, wherein a layer of the cable is formed by a single wrap of the cable onto a container. The system further comprises a monitoring circuit coupled to the first and second sensors, wherein the monitoring circuit is configured to determine the line pull of the winch based on the torque generated by the winch and the number of layers of cable retracted onto the container.
US07671543B2
The invention provides a light exposure apparatus containing a light exposure control device for curing light sensitive adhesives. The light exposure apparatus includes a) a light source; b) a light transmitter for transmitting light from the light source; and c) a light intensity controlling component between the light source and the light transmitter. The light intensity controlling component includes a light regulator having a planar face between the light source and the light transmitter. The light regulator has opaque members having a continuously tapered width, on the face of the light regulator. Each planar member is spaced from adjacent planar members by a light transparent segment having a tapered width, on the face of the light regulator. The light regulator is mounted such that a portion of the opaque members and portion of the substantially light transparent segments are adjustably positioned between the light source and the light transmitter.
US07671534B2
When a long illuminant module is constructed, debonding of a bonded interface or bending occurs due to a difference in a magnitude of thermal deformation between a lens material and a metal substrate. In an illuminant module including light emitting elements, a substrate on which the light emitting elements are mounted, a transparent encapsulating resin which encapsulates the light emitting elements, and a lens material having cavities formed therein, in which the respective light emitting elements and transparent encapsulating resin are stored, notches are formed in a surface of the lens material on the side of the substrate, and the notch surfaces of the notches and the surface of the substrate are bonded using a bonding material.
US07671530B2
Provided are an organic electroluminescence display device and method of fabricating the same. An organic electroluminescence display device according to the present invention includes a first substrate; a plurality of data lines arranged in a first direction on the first substrate; a plurality of gate lines arranged in a second direction on the first substrate; a plurality of pixel regions defined by the gate lines and the data lines, wherein a first pixel line is defined as a line of the pixel regions arranged in the first direction and a second pixel line is defined as a line of the pixel regions arranged in the second direction; a thin film transistor in each pixel region; a plurality of first connecting lines electrically connecting the thin film transistors of the first pixel lines with each other; and a second connecting line electrically connecting the thin film transistor of at least one of the second pixel lines.
US07671528B2
A display apparatus includes a substrate; a plurality of pixels arranged above the substrate, each including a plurality of sub-pixels emitting light of different colors; a circularly polarizing member disposed above the pixels, the transmittance of light of a selected color through the circularly polarizing member being higher than that of light of the other colors therethrough; and a light-absorbing member disposed only above the sub-pixels, emitting light of the non-selected colors. The light-absorbing member absorbs light of the selected color.
US07671524B2
A flat light source having a main region and an edge region around the main region is provided. The flat light source includes a first substrate, first electrodes, dielectric patterns, a phosphor layer, first phosphor patterns, a second substrate, and a sealant. The first electrodes are disposed on the first substrate and arranged within the main region and the edge region. The dielectric patterns cover the first electrodes. The phosphor layer is disposed between the dielectric patterns in the main region and the edge region. The first phosphor patterns are disposed on the phosphor layer within the edge region. The second substrate is disposed above the first substrate, and the sealant is formed out of the edge region between the first and second substrates so as to bond the two substrates.
US07671517B2
A piezoelectric electroacoustic transducer includes a substantially rectangular piezoelectric diaphragm, a case having supports to support the four corners of the bottom surface of the piezoelectric diaphragm, terminals fixed to the case, each including an inner connection portion exposed near the supports, a first elastic adhesive disposed between the periphery of the piezoelectric diaphragm and the terminals, a conductive adhesive disposed between electrodes of the piezoelectric diaphragm and the terminals across the top surface of the first elastic adhesive, a second elastic adhesive filling and sealing a gap between the periphery of the piezoelectric diaphragm and an inner portion of the case, and an overamplitude-preventing receiver provided on a bottom wall of the case to limit the amplitude of vibration of the piezoelectric diaphragm to a predetermined range. The overamplitude-preventing receiver is disposed closer to the center of the piezoelectric diaphragm than the supports.
US07671516B2
An ultrasonic actuator includes: a piezoelectric element 10 for generating various kinds of vibrations having different vibration directions; a driver element provided on the piezoelectric element 10 and actuated in accordance with the vibration of the piezoelectric element 10 to output driving force toward a certain driving direction; feeding electrodes 8 provided on the piezoelectric element 10 and electrically connected to the piezoelectric element 10; and feeding-supporting parts 6A, 6B, 7A, 7B and 9A abutting the feeding electrodes to elastically support the actuator body and serving as feeding terminals for supplying a voltage to the feeding electrodes 8.
US07671511B2
This invention relates to a system for exciting oscillations of micromechanical cantilever sensors and for measuring and evaluating the corresponding oscillations. Such sensors can e.g. be used to detect chemical substances, biomolecules, microorganisms or viruses, or to analyze surface-related phenomena and processes such as conformational changes or phase transitions in thin layers, or to measure physical properties of their surrounding, such as viscoelastic properties of liquids. In the so-called dynamic operation mode, cantilever oscillations are excited and the frequency shift of the ground frequency and/or of one or some higher harmonics, occurring because of a process taking place at the cantilever surface, are measured. In the so-called static mode, the deflection of the cantilever is determined. The setup described in this invention allows measurements in gases as well as liquids. It is characterized by an efficient transfer of the oscillation from a piezoelectric driver element to the cantilever over a wide frequency range. This is achieved through a sophisticated combination of a solid support structure, oscillation driver and insulators.
US07671508B2
According to the present invention, an alternator includes a rotor, a stator, and at least one cooling fan. The rotor includes a rotary shaft, a field core, and a field coil. The field coil has first and second ends that are opposite to each other in an axial direction of the rotary shaft. The stator includes an armature core and an armature coil. The armature core has first and second ends that are opposite to each other in the axial direction. The first end of the armature core is closer to the first end than the second end of the field coil. An axial distance between the first and second ends of the field coil is less than that between the first and second ends of the armature core. The first end of the field coil protrudes outward from the first end of the armature core in the axial direction.
US07671504B2
An electric motor is disclosed with an air-cored winding which is composed of a plurality of single coils made of wire, wherein the single coils overlap each other in an imbricated manner and the single coils are preformed to form an offset at least in the region of two opposite corners, so that half of the legs are located in a first plane and half of the legs are located in a second plane. A more inexpensive and more robust assembly of air-cored windings for electric motors can thereby be achieved.
US07671493B2
A vibration assembly includes a container, a vibration member containing a hollow portion with a bottom, at least two support members, a magnetic body, a coil having a spool axis, and a diaphragm that is attached to the container. Each of the support members has a flat and corrugated configuration. An end of the one of the support members is bonded to a portion of an edge portion of the hollow portion of the vibration member. The other end of the one of the support members is fixed to a portion of an upper edge of the container. An end of the other support member is bonded to the other portion of the edge portion of the hollow portion of the vibration member. The other end of the other support member is fixed to the other portion of the upper edge of the container.
US07671479B2
A small portable power pack includes a fuel/air supply for mixing fuel, which is supplied from outside, with outside air, thereby providing mixed gas; a uniflow scavenging micro-engine for receiving mixed gas from the fuel/air supply and igniting mixed gas to explode; a control panel for operating and controlling the uniflow scavenging micro-engine; a capacitor battery for powering the control panel and the uniflow scavenging micro-engine. The portable power pack is easily carried and used without the restriction of spaces and sites.
US07671475B2
A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.
US07671467B2
A power semiconductor module having an integral circuit board with a metal substrate electrode, an insulation substrate and a heat sink joined is disclosed. A SiC semiconductor power device is joined to a top of the metal substrate electrode of the circuit board. A difference in average coefficients of thermal expansion between constituent materials of the circuit board in a temperature range from room to joining time temperatures is 2.0 ppm/° C. or less, and a difference in expansion, produced by a difference between a lowest operating temperature and a joining temperature, of the circuit-board constituent materials is 2,000 ppm or less.
US07671461B2
A system for hermetically sealing devices. The system includes a substrate, which includes a plurality of individual chips. Each of the chips includes a plurality of devices and each of the chips are arranged in a spatial manner as a first array. The system also includes a transparent member of a predetermined thickness, which includes a plurality of recessed regions arranged in a spatial manner as a second array and each of the recessed regions are bordered by a standoff region. The substrate and the transparent member are aligned in a manner to couple each of the plurality of recessed regions to a respective one of said plurality of chips. Each of the chips within one of the respective recessed regions is hermetically sealed by contacting the standoff region of the transparent member to the plurality of first street regions and second street regions using at least a bonding process to isolate each of the chips within one of the recessed regions.
US07671458B2
A connector includes a fitting hole into which a signal line is fitted, a tapered portion formed to lead a tip portion of the signal line to the fitting hole, and a bonded portion for bonding the connector to a control substrate. The tapered portion has a tapered shape on a side where the signal line is inserted. The tapered shape is tilted from a peripheral portion of the tapered portion to the fitting hole in a direction along which the signal line is inserted, with the fitting hole set as a center.
US07671452B1
A microarray package includes a leadframe having an array of contact posts, a die carried by the lead frame, and a plurality of bonding wires that electrically connect the die to the lead frame. An encapsulant is included that encapsulates the die, the bonding wire and the leadframe while leaving the distal ends of the contact posts exposed and substantially co-planar with a bottom surface of the microarray package. A plurality of pedestal members is plated to the distal end of a respective contact pad. A distal surface of each pedestal member protrudes outwardly beyond the bottom surface of the microarray package in the range of about 15 μm to about 35 μm.
US07671450B2
An integrated circuit package having a multi-segment transmission line transformer for impedance matching a packaged integrated circuit, such as a driver or receiver, to a printed circuit board (PCB) transmission line to which the packaged chip is attached by, for example, solder balls. In one exemplary embodiment, a three-segment transmission line transformer provides improved broadband performance with the advantage of having a middle segment with a flexible length for easier routing. The length of each end segment of the three-segment transformer is adjusted to provide at least partial cancellation of reflections between the PCB and the transformer, and between the transformer and a circuit on the integrated circuit, respectively. Further, the inductive reactance of the solder balls and via wiring may be cancelled out by the transformed chip impedance to provide a non-inductive termination to the PCB transmission line at approximately one-half the highest data rate of the channel.
US07671449B2
One embodiment of the present invention provides a system that facilitates high-bandwidth communication using a flexible bridge. This system includes a chip with an active face upon which active circuitry and signal pads reside, and a second component with a surface upon which active circuitry and/or signal pads reside. A flexible bridge provides high-bandwidth communication between the active face of the chip and the surface of the second component. This flexible bridge provides a flexible connection that allows the chip to be moved with six degrees of freedom relative to the second component without affecting communication between the chip and the second component. Hence, the flexible bridge allows the chip and the second component to communicate without requiring precise alignment between the chip and the second component.
US07671445B2
The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment (200), obviating overstress or break down damage to a focal device structure (208) that might result from uncontrolled dissipation of the aberrant charge. A substrate (202) has first and second intermediate structures (204, 206) disposed atop the substrate, with the focal structure disposed atop the substrate therebetween. A first conductive structure (210) is disposed atop the second intermediate structure, the focal structure, and a portion of the first intermediate structure. A third intermediate structure (214) is disposed contiguously atop the first conductive structure and the first intermediate layer. A void (216) is formed in a peripheral region (218) of device segment, through the first and third intermediate layers down to the substrate. A second conductive structure (220) is disposed atop the third intermediate structure such that it couples the substrate through the void.
US07671442B2
Air-gap insulated interconnection structures and methods of fabricating the structures, the methods including: forming a dielectric layer on a substrate; forming a capping layer on a top surface of the dielectric layer; forming a trench through the capping layer, the trench extending toward said substrate and into but not through, the dielectric layer; forming a sacrificial layer on opposing sidewalls of the trench; filling the trench with a electrical conductor; and removing a portion of the sacrificial layer from between the electrical conductor and the dielectric layer to form air-gaps.
US07671441B2
A semiconductor power device includes a semiconductor body with a plurality of gate trenches formed therein. Disposed within each gate trench is a spacer gate that extends along at least a portion of the sidewalls of the gate trench but not along at least a portion of the bottom surface of the trench. The spacer gate of each gate trench may also include a layer of silicide along outer surfaces thereof. The semiconductor body may include a channel region and each gate trench may extend through the channel region and into the semiconductor body. Formed at the bottom of each gate trench within the semiconductor body may be a tip implant of the same conductivity as the semiconductor body. In addition, a deep body implant of the same conductivity as the channel region may be formed at the base of the channel region.
US07671440B2
A field-effect transistor having cells (18) each having a source region (22), source body region (26), drift region (20), drain body region (28) and drain region (24) arranged longitudinally, laterally alternating with structures to achieve a reduced surface field. In embodiments, the structures can include longitudinally spaced insulated gate trenches (35) defining a gate region (31) adjacent the source or drain region (22, 24) and a longitudinally extending potential plate region (33) adjacent the drift region (20). Alternatively, a separate potential plate region (33) or a longitudinally extending semi-insulating field plate (50) may be provided adjacent the drift region (20). The transistor is suitable for bi-directional switching.
US07671432B2
A dynamic quantity sensor includes a sensor chip having a movable portion at one surface side thereof and a silicon layer at another surface side thereof. The movable portion is displaced under application of a dynamic quantity. The silicon layer is separated from the movable portion through an insulator. The dynamic quantity sensor also includes a circuit chip for transmitting/receiving electrical signals to/from the sensor chip. The circuit chip is disposed to confront the one surface of the sensor chip through a gap portion and cover the movable portion. The sensor chip and the circuit chip are bonded to each other around the gap portion so that a bonding portion is formed to substantially surround the gap portion and thereby seal the gap portion.
US07671425B2
In a semiconductor device, pining regions 105 are disposed along the junction portion of a drain region 102 and a channel forming region 106 locally in a channel width direction. With this structure, because the spread of a depletion layer from a drain side is restrained by the pining regions 105, a short-channel effect can be restrained effectively. Also, because a passage through which carriers move is ensured, high mobility can be maintained.
US07671424B2
A metal oxide semiconductor field effect transistor includes a semiconductor substrate; a well region containing an impurity of a first conductivity type disposed on the semiconductor substrate, the well region including a source region and a drain region formed by adding an impurity of a second conductivity type, the source region and the drain region being separated from each other by a predetermined gap; an insulating film disposed on the surface of the well region in the gap between the source region and the drain region; and a gate electrode disposed on the insulating film. The well region is composed of an epitaxial layer, and the epitaxial layer includes an impurity layer of the first conductivity type having a different impurity concentration.
US07671404B2
A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.
US07671397B2
There is disclosed a switching element including a first input/output electrode, a movable portion which repeats contact/non-contact with respect to the first input/output electrode, a second input/output electrode connected with the movable portion, a floating gate electrode which is coupled with the movable portion through an insulating layer and in which electric charge is stored, and a first gate electrode which generates an electrostatic force between itself and the floating gate electrode to control an operation of the movable portion.
US07671392B2
A photoreceiver cell with separation of color components of light incident to its surface, formed in a silicon substrate of the conductivity of the first type with an ohmic contact and comprising: the first, second and third regions, which have mutual positioning and configuration, which provide formation of the first and the second channels for diffusion of the secondary charge carriers generated in the substrate regions located under the first and the second potential barriers to the first and the third p-n junctions respectively; in this case, the length of the channels does not exceed the diffusion length of the secondary charge carriers. Some embodiments provide increased spatial resolution of the projected image and its dynamic range. Some embodiments provide small photo-cell area. Some embodiments are used in multielement photoreceivers for video cameras and digital cameras.
US07671386B2
The solid-state imaging device of the present invention includes: a floating diffusion capacity unit which is formed on a semiconductor substrate, and is operable to hold signal charges derived from incident light; an amplifier which is operable to convert the signal charges held in the floating diffusion capacity unit into a voltage; the first wire which connects the floating diffusion capacity unit to an input of the amplifier; and a second wire which is made of the same material as the first wire, formed in the same layer as the first wire, arranged around the first wire at least along long sides of the first wire, and electrically insulated from the first wire.
US07671373B2
An LED chip package structure using a ceramic material as a substrate includes a ceramic substrate, a conductive unit, a hollow ceramic casing, a plurality of LED chips, and a package colloid. The ceramic substrate has a main body, and a plurality of protrusions extended from three faces of the main body. The conductive unit has a plurality of conductive layers formed on the protrusions, respectively. The hollow casing is fixed on a top face of the main body to form a receiving space for exposing a top face of each conductive layer. The LED chips are received in the receiving space, and each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected to different conductive layers. In addition, the packaging colloid is filled into the receiving space for covering the LED chips.
US07671370B2
Improvement in characteristics of a SELAX-TFT and throughput of ELA crystallization is achieved. When a thin film transistor using pseudo single crystal semiconductor and a thin film transistor using particulate polysilicon semiconductor are formed on a single substrate, the film thickness of an amorphous semiconductor film before crystallization in the pseudo single crystal semiconductor portion is greater than that in the polysilicon semiconductor portion.
US07671362B2
A test structure for integrated circuit (IC) device fabrication includes a plurality of test structure chains formed at various regions of an IC wafer, each of the plurality of test structure chains including one or more vias; each of the one or more vias in contact with a conductive line disposed thereabove, the conductive line being configured such that at least one dimension thereof varies from chain to chain so as to produce variations in seed layer and liner layer thickness from chain to chain for the same deposition process conditions.
US07671361B2
Provided are a semiconductor device including a fuse focus detector, a fabrication method thereof and a laser repair method. In a chip region, fuses may be formed at a first level. A fuse focus detector including first and second conductive layers may be formed in a scribe line region. The first conductive layer may be formed at the first level, while the second conductive layer may be formed at a different level. For a laser repair method, a target region may be divided into sub-regions. In one selected sub-region, the fuse focus detector may be laser scanned in a direction for a reflection light measurement providing information on a thickness of the fuse focus detector. Using the thickness information, a focus offset value of a fuse in the selected sub-region may be calculated. When the focus offset value is within an allowable range, fuse cutting may be performed.
US07671346B2
A UV curing apparatus and method is provided for enhancing the distribution and application of UV light to UV photo initiators in a UV curable ink, coating or adhesive. The UV curing apparatus and method comprises UV LED assemblies in a first row with the UV LED assemblies spaced from adjacent UV LED assemblies. At least one second row of a plurality of UV LED assemblies are provided next to the first row but with the UV LED assemblies of the second row positioned adjacent the spaces between adjacent UV LED assemblies in the first row thereby to stagger the second row of UV LED assemblies from the UV LED assemblies in the first row. Desirably, the rows of staggered UV LED assemblies are mounted on a panel. UV curable products, articles or other objects containing UV photo initiators that are in or on a web can be conveyed or otherwise moved past the rows of UV LED assemblies for effective UV curing. This arrangement facilitates more uniformly application of UV light on the UV curable ink, coating and/or adhesives in the UV curable products, articles or other objects. The apparatus can include one or more of the following: rollers for moving the web, mechanisms for causing the panel to move in an orbital or reciprocal path, and an injection tube for injecting a non-oxygen gas in the area of UV light curing.
US07671335B2
An infrared detector includes a circuit block carrying an infrared sensor element and electronic components. The circuit block is composed of a dielectric resin layer and a first substrate formed with a circuit pattern and mounting the electronic components. The dielectric resin layer is formed in its top with a recess which defines around its periphery with a shoulder for supporting opposite ends of the infrared sensor. The first substrate is integrated to the lower end of the dielectric resin layer with at least one of the electronic components being molded into the dielectric resin layer to make the circuit block of a unified mold structure. Thus, a part or all of the electronic components are molded into the dielectric layer to realize the circuit block of a simple and low profile structure, while retaining an advantage of keeping the infrared sensor element sufficiently away from the electronic components and an associated electronic circuit, thereby assuring to give the infrared detector which is simple in construction, economical in cost, and reliable in the infrared detection.
US07671331B2
An imaging system comprises a plurality of imaging detectors acquiring imaging data indicative of a patient over a length of time. The plurality of imaging detectors are arranged proximate the patient and remain in a fixed position with respect to the patient. A processor receives the imaging data and divides the imaging data into sub-sets. The processor iteratively processes the sub-sets.
US07671324B2
An anti-tamper enclosure system comprises an optical medium; at least one photosensitive sensor configured to measure at least one characteristic of a light wave transmitted in the optical medium; at least one logic circuit coupled to the at least one photosensitive sensor, the at least one logic circuit configured to initiate security measures when the at least one characteristic of the light wave changes; an enclosure coupled to the optical medium and configured to enclose the optical medium, the at least one photosensitive sensor, and the at least one logic circuit; and a plurality of attachment posts configured to be coupled to a printed circuit board, wherein at least one of the plurality of attachment posts is also coupled to the optical medium.
US07671323B2
A semiconductor apparatus includes an optical waveguide provided within a semiconductor region and above an insulating layer, and a plurality of photodetectors provided at the optical waveguide. The plurality of photodetectors includes insulated-gate field-effect transistors. The photodetectors capture data at different timings.
US07671320B2
The semiconductor device includes a first photodiode, a second photodiode which is shielded from light, a first circuit group including a voltage follower circuit, a second circuit group, and a compensation circuit, in which an output from the first photodiode is inputted to the voltage follower circuit of the first circuit group, an output from the first circuit group is inputted to the compensation circuit, and an output from the second photodiode is inputted to the compensation circuit through the second circuit group. By adding or subtracting these inputs in the compensation circuit, an output fluctuation due to temperature of the first photodiode is removed. Note that a reference potential is supplied to the first photodiode so that an open circuit voltage is outputted, and a potential is supplied to the second photodiode so that a forward bias is applied to the second photodiode.
US07671319B2
An energy sensor comprises a radiation-sensitive detector, a circuit, and an analog-to-digital converter. The radiation-sensitive detector is arranged to receive a pulsed radiation beam and to generate a current in response thereto. The circuit is equivalent to an RC network and is electrically connected across the radiation-sensitive detector. The analog-to-digital converter is electrically connected across a resistive component of the circuit and is arranged to output digital samples measuring the voltage across the resistive component at a sampling rate that is greater than the pulse repetition rate of the pulsed radiation beam. The energy sensor may be provided as part of a transmission image sensor.
US07671314B2
In one aspect, an image sensor is provided which includes an array of unit active pixels. Each of the unit active pixels comprises a first active area including a plurality of photoelectric conversion regions, and a second active area separated from the first active area. The first active areas are arranged in rows and columns so as to define row and column extending spacings there between, and the second active areas are located at respective intersections of the row and column extending spacings defined between the first active areas.
US07671312B2
The present invention provides an optical pickup system including a first light source emitting a light flux with a first wavelength; a second light source emitting a light flux with a second wavelength; and a light-converging optical system converging the light flux with the first wavelength from the first light source with a first magnification onto a first reference surface set at a first depth, and converging the light flux with the second wavelength from the second light source with a second magnification onto a second reference surface set at a second depth. The first and second wavelengths, the first and second depths, and the first and second magnifications satisfy: a first condition according to an aberration and a second condition according to a working distance.
US07671301B2
A cooking appliance heating element shield apparatus and method are provided. The apparatus is adapted for use in an electric self-cleaning cooking appliance of the type having an oven cavity heated by a coil heating element of a heating element assembly. The apparatus includes an elongate main portion comprising a substantially planar surface and adapted for positioning between the oven cavity and a portion of the heating element to dissipate direct heat transmitted to the oven cavity from the heating element. The apparatus also includes at least one connection portion adapted for removably attaching the elongate main portion to the heating element assembly.
US07671299B2
A heating assembly used for providing heat to the hands of a person using equipment with handlebars. The heating assembly is installed internal to the handlebars and provides heat to the handlebar grips normally installed on equipment of this type. This system works with existing grips, i.e. special heated grip systems are not required. The current invention is thus usable with a wider variety of handlebar grip devices currently used on motorcycles, snowmobiles, snow blowers and other outdoor devices utilizing handlebars.
US07671298B2
A heating line pattern structure is provided, in which the effect of the heating lines of a defogger on an antenna for a TV broadcast especially for a digital TV broadcast may be decreased. The defogger is structured by arranging heating lines between bus bars on both sides. The portion of an uppermost heating line in proximity to the monopole antenna are folded rectangularly at a regular interval to form a meander shape. One lateral heating line is extended under the meander-shaped heating line portion, and is connected to a vertical heating line to which four lateral heating lines are connected together.
US07671295B2
A set (50) of laser pulses (52) is employed to sever a conductive link (22) in a memory or other IC chip. The duration of the set (50) is preferably shorter than 1,000 ns; and the pulse width of each laser pulse (52) within the set (50) is preferably within a range of about 0.1 ps to 30 ns. The set (50) can be treated as a single “pulse” by conventional laser positioning systems (62) to perform on-the-fly link removal without stopping whenever the laser system (60) fires a set (50) of laser pulses (52) at each link (22). Conventional IR wavelengths or their harmonics can be employed.
US07671292B2
Operating mechanism for medium and high voltage switchgear, in which a rotatable main shaft is coupled to a switch, and a rocker plate is rotatable with the main shaft, the main shaft being arranged to open and close said switch by tilting the rocker plate. The rocker plate constitutes a plurality of force transmission levers and comprises a plurality of zones distributed around the main shaft. A rotary actuator has force transmitting means for driving the rocker plate in a direction corresponding to closing of the switch, and an opening spring for driving the rocker plate in a direction corresponding to opening of the switch. Closed switch locking means are coupled to the rocker plate (4) and are disposed substantially in a common plane of the rocker plate.
US07671290B2
For a cell-phone or PDA, the rows of key-caps include respective light-strips, which pick up light from respective LEDs surface-mounted on the PCB. The light-strips are sandwiched between the key-caps and the key-switch actuators (whereby the light-strips move with the keys when the keys are depressed). Sockets for receiving the key-caps are co-molded to the light-strips. Sockets are provided in the resilient webs of the keys for receiving under-blocks co-molded to the light-strips.
US07671280B1
The bird guard provides a device to protect electrical insulators comprising a central shaft; a clamp attached to an end of the shaft to secure the device to a transmission tower; a top and bottom cover to shield transmission tower insulators; and bearings to allow the guard to rotate in order to frighten birds away from the insulators.
US07671277B2
The present invention is directed towards a multi-channel raceway system with a raceway and a fitting component. The raceway includes a base with a bottom and sidewalls that define a channel and a divider wall positioned within the channel. The fitting component includes a base with a bottom and sidewalls that define a channel and a plurality of sets of raised projections. The fitting component also includes a fitting divider wall positioned within the channel of the fitting component. The fitting divider wall includes at least one positioning tab along the bottom of the fitting divider wall for engaging the raised projections extending from the fitting base to secure the fitting divider wall to the fitting base.
US07671274B2
An apparatus fixing a power cable to an insulator, which clamps the head of the insulator to fix the power cable to an insulator head, easily and firmly. To this end, the apparatus includes a main body formed with a vertical through bolt hole in the center, with a space, formed beneath the bolt hole, with a round open bottom which holds the power cable; a fixed clamp formed on one side of the main body with a latch at the bottom to hook the insulator head; a movable clamp formed on the opposite side of the main body with a latch at the bottom to hook the other side of the insulator head; a movable, elastic holding member formed on the space part of the main body, with a groove on the bottom to hold upper part of the power cable; a fixing bolt engaged in the bolt hole of the main body, pressing the elastic holding member by screwing inward, so that the power cable can be fixed between the holding groove on top of the insulator and the holding groove on the bottom of the elastic holding member; and a movable clamp fixing member to fix the movable clamp engaged with the insulator head.
US07671267B2
The invention relates to a method for automatic generation of melodies where from one step to a following a new parameter value is generated that is sent to a unit emitting sound. The parameters comprise a new note pitch, a new window width, a life span for the window width, a window offset and a life span for the window offset. The new note pitch is selected according to a given probability distribution within the interval of note pitches given by the note pitch in a previous step, the window width and the window offset.
US07671265B2
An instructional system for teaching music theory incorporates a human-readable harmony matrix which displays at least one repeat pattern of indicia corresponding to a particular placement of the notes of the twelve note scale. This pattern is arranged so that major or minor chords may be formed by rotations and/or inversions of a basic set of patterns. These patterns depict the interrelationship of the various chords. Transposition of chords from one key to another may be readily accomplished by moving the pattern across the matrix. The matrix pattern may also be used to depict and build chord progressions. The system operates to provide a two-dimensional representation of the relationship between musical tones and may be implemented in a variety of systems for teaching music theory.
US07671262B1
This specification discloses an adjusting mechanism of an instrument pedal that is pivotally disposed on a pivotal axis of a base to sway along the radial direction of the pivotal axis. The adjusting mechanism has a foundation. There is an arc surface around the radial direction of the pivotal axis outside the foundation. A sliding groove is formed along the radial direction of the arc surface. A fixed hole is formed on the pivotal axis corresponding to the sliding groove. One end of the fixing element goes through the sliding groove and connects to the fixing hole. The other end of the fixing element engages with the arc surface on both sides of the sliding groove for fixing the adjusting mechanism.
US07671247B2
Methods for purifying liquid alkanes are provided. The methods produce alkanes having low absorbance, particularly at 193 nm. The alkane liquids are useful as immersion liquids in photomicrolithography employed for production of electronic circuits.
US07671244B2
The invention relates to a method for producing high-purity 1,2-dichloroethane from dissolved chlorine and dissolved ethylene which are brought into contact with each other using a circulating liquid reaction medium which essentially consists of 1,2-dichloroethane and a catalyst and passes through at least one reaction loop. The two limbs of the loop are connected to a gas-phase stripping container which is arranged at the top and from which the reaction product is outwardly transferred either in a gaseous or liquid form or both in a gaseous form and in a liquid form. The addition points for the addition of chlorine and dissolved ethylene are arranged in the limb of the loop in which the liquid rises. The addition point for dissolved chlorine is always arranged downstream of the ethylene addition point. At least one addition point for liquid 1,2-dichloroethane follows each chlorine addition point, and the addition of the liquid 1,2-dichloroethane is carried out under kinetic energy which is high enough to enable a vigorous mixture of 1,2-dichloroethane, dissolved chlorine and ethylene to be carried out. Preferably, the liquid 1,2-dichloroethane is added by means of at least one jet mixer.
US07671240B2
Processes for preparing tri- and tetraoxymethylene glycol dimethyl ether (POMDMEn=3,4) include feeding a reaction mixture of an aqueous formaldehyde solution and methanol into a reactive evaporator and separating into a first low boiler fraction and a first high boiler fraction, recycling the first high boiler fraction into the reactor, feeding the first low boiler fraction into a first distillation column and separating into a second low boiler fraction and a second high boiler fraction, recycling the second high boiler fraction into the reactive evaporator, feeding the second low boiler fraction into a second distillation column and separating into a third low boiler fraction and a third high boiler fraction, feeding the third high boiler fraction into a phase separation apparatus and separating into an aqueous phase and an organic phase, and feeding the organic phase into a third distillation column and separating into a low and high boiler fractions.
US07671237B2
This invention discloses a process for making dilithium initiators in high purity. This process can be conducted in the absence of amines which is desirable since amines can act as modifiers for anionic polymerizations. The dilithium compounds made are highly desirable because they are soluble in aromatic solvents. The present invention also discloses a tire which is comprised of a generally toroidal-shaped carcass with an outer circumferential tread, two spaced beads, at least one ply extending from bead to bead and sidewalls extending radially from and connecting said tread to said beads, wherein said tread is adapted to be ground-contacting, and wherein said tread is a cured the rubber formulation which is comprised of (a) at least one rubbery polymer containing functional groups of the structural formula: wherein R, R′ and R″ can be the same or different, wherein R is selected from the group consisting of hydrogen atoms, alkyl groups, aryl groups, alkaryl groups, and amino aryl groups, and wherein R′ and R″ represent alkyl groups alkyl groups that contain from 1 to 8 carbon atoms, and (b) at least one member selected from the group consisting of carbon black and silica.
US07671235B2
Compounds of the formula I, II or III: or pharmaceutically acceptable salts thereof, wherein m, n, q, Ar, R1, R2, R3, R4 and R5 are as defined herein. Also provided are methods for preparing, compositions comprising, and methods for using compounds of formulas I-III.
US07671232B2
A method for fabricating a high specific surface area mesoporous alumina is disclosed, which includes the following steps: (a) providing a water solution containing an aluminum salt and a fluoro-surfactant; (b) adding concentrated hydrochloric acid to adjust the PH value of the solution to about 6.0 to 8.0; (c) aging the solution at 70° C. to 110° C. for 12 to 20 hours; (d) washing the precipitate with water; (e) washing the precipitate with an organic solvent; (f) drying the precipitate; and (g) sintering the precipitate in a furnace of 500° C. to 1000° C.
US07671227B2
An asymmetric bis-silane compound of the formula A3Si—R1—SiB3 where A, B, and R1 are as defined herein, and to methods for making the bis-silane compound and their use to form layers or films of metal oxide particles, and which layers or films adhere to a suitable substrate. The materials and methods can be used, for example, to make photoactive devices.
US07671223B2
The present invention relates to a process for the racemoselective preparation of ansa-metallocene complexes of the formula (I) which comprises reacting a ligand starting compound of the formula (II) with a transition metal compound of the formula (III) (LB)yM1(NR3R4)Xx-1 (III) where R1, R1′ are identical or different and are each hydrogen or an organic radical having from 1 to 40 carbon atoms, R2, R2′ are identical or different and are each hydrogen or an organic radical having from 1 to 40 carbon atoms, R3 is an organic radical having from 1 to 40 carbon atoms, R4 is hydrogen or an organic radical having from 1 to 40 carbon atoms, T, T′ are identical or different and are each a divalent organic group which has from 1 to 40 carbon atoms and together with the cyclopentadienyl ring forms at least one further saturated or unsaturated, substituted or unsubstituted ring system which has a ring size of from 5 to 12 atoms, where T and T′ may contain the heteroatoms Si, Ge, N, P, As, Sb, O, S, Se or Te within the ring system fused to the cyclopentadienyl ring, A is a bridge consisting of a divalent atom or a divalent group, M1 is an element of group 3, 4, 5 or 6 of the Periodic Table of the Elements or the lanthanides, the radicals X are identical or different and are each an organic or inorganic radical which can be substituted by a cyclopentadienyl anion, x is a natural number from 3 to 6, M2 is an alkali metal, an alkaline earth metal or a magnesium monohalide fragment, p is 1 in the case of doubly positively charged metal ions or is 2 in the case of singly positively charged metal ions or metal ion fragments, LB is an uncharged Lewis-base ligand and y is a natural number from 0 to 6, and also a further process for the racemoselective preparation of ansa-metallocene complexes of the formula (IV) starting from the metallocene complexes of the formula (I) prepared by the first process, the use of transition metal compounds of the formula (III) for preparing metallocenes and also specific transition metal compounds of the formula (III).
US07671221B2
Compounds of the present invention and pharmaceutically acceptable compositions thereof, are useful as modulators of ATP-Binding Cassette (“ABC”) transporters or fragments thereof, including Cystic Fibrosis Transmembrane Conductance Regulator (“CFTR”). The present invention also relates to methods of treating ABC transporter mediated diseases using compounds of the present invention.
US07671220B2
The present invention relates to methods for the preparation of 3,3-dialky 4-chromanones, and particularly to the preparation of 6-fluoro-3,3-dimethyl-2,3-dihydro-4H-chromen-4-one and 3,3-dimethyl-2,3-dihydro-4H-chromen-4-one. In some embodiments, the processes include reaction of a 4-chromanone compound with an alkyl halide in the presence of a metal alkoxide at low temperature.
US07671210B2
A process for production of an optically active cyclopropanecarboxylate compound represented by the formula (5): wherein R6, R7, R8 and R9 represent a C1-C6 alkyl group or the like and R10 represents a C1-C6 alkyl group, which comprises reacting an olefin represented by the formula (3): wherein R6, R7, R8 and R9 are as described above, with a diazoacetic acid ester represented by the formula (4): N2CHCO2R10 (4) wherein R10 is as described above, in the presence of an asymmetric copper complex obtained by mixing (A) at least one monovalent or divalent copper compound,(B) at least one optically active bisoxazoline compound represented by the formula (1): wherein R1 and R2 represent a C1-C6 alkyl group or the like; R3 represents a tert-butyl group or the like; and R4 and R5 are the same and represent C1-C3 alkyl groups or the like, and (C) at least one boron compound represented by the formula (2): wherein A represents a trityl group or the like, X represents a fluorine atom or the like, and n represents an integer of 1 to 5.
US07671200B2
Quinazolinones of formulae (a, b, c and d) are disclosed. They are useful for treating cellular proliferative diseases and disorders associated with KSP kinesin activity.
US07671198B2
The invention provides 8-azabicyclo[3.2.1 ]octyl intermediates useful for the preparation of 5-HT4 receptor agonist compounds. The invention also provides processes for the preparation of such useful intermediates.
US07671197B2
The present invention relates to a process for the purification of meloxicam and in particular of the impurity composed of 4-hydroxy-2-methyl-N-ethyl-N′-(5-methyl-2-thiazolyl)-2H-1,2-benzothiazine-3-carboxamide-1,1-dioxide and to meloxicam containing a quantity of less than 0.05% of the above-mentioned impurity (“ethylamide”).
US07671192B2
Synthesis methods suitable for large scale manufacture of the A2A-adenosine receptor agonist (1-{9-[(4S,2R,3R,5R)-3,4-dihydroxy-5-(hydroxymethyl)oxolan-2-yl]-6-aminopurin-2-yl}pyrazol-4-yl)-N-methylcarboxamide and precursors thereof.
US07671190B2
The invention relates to recombinant polyketide synthase enzymes, polyketide modifying proteins, and other proteins involved in polyketide biosynthesis or function. The invention provides domains of geldanamycin and herbimycin polyketide synthases, polynucleotides that encode such enzymes, and to host cells in which such encoding polynucleotides can be advantageously expressed.
US07671178B1
Silk is dissolved in an ionic liquid and is regenerated in a range of structural forms without requiring the use of harmful solvents. Silk solubility can be controlled by the selection of the ionic liquid constituents, with small cations and halide or pseudohalide anions favoring solution. The rinse solvent exercises a significant influence over the final properties of the regenerated silk.
US07671175B2
The present invention relates to isolated polypeptides having antimicrobial activity and isolated polynucleotides encoding the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods for producing and using the polypeptides.
US07671172B2
A poly(trimethylene-ethylene ether) glycol is disclosed. The poly(trimethylene-ethylene ether) glycol is, preferably, prepared by the polycondensation of 1,3-propanediol reactant and ethylene glycol reactant. The composition is preferably used in breathable membranes, synthetic lubricants, hydraulic fluids, cutting oils, motor oils, surfactants, spin-finishes, water-borne coatings, laminates, adhesives, packaging, films and foams, fibers and fabrics.
US07671156B2
The present invention provides silicone hydrogel materials having relatively high oxygen permeability and a relatively low modulus. The relatively-low modulus is achieved by adding a chain transfer agent into a polymerizable fluid composition in an amount sufficient to provide to the resultant silicone hydrogel material with a reduced modulus. In addition, the invention provides silicone hydrogel contact lenses comprising a silicone hydrogel material of the invention, a method for making a silicone hydrogel material of the invention, and a method for making a silicone hydrogel contact lens of the invention.
US07671125B2
A process for preparing organopolysiloxane compositions (A) having a viscosity measured at 25° C. of at least 500 Pa·s., wherein organopolysiloxanes (O) and fillers (F) are mixed and kneaded in a first process stage in a kneading cascade having at least two kneading chambers arranged in series adjacent one another, each containing kneading tools having parallel axes and capable of being driven in co-rotating or counter-rotating directions, the chambers connected to one another by means of openings through which material can pass in a direction transverse to the axes of the kneading tools, with the first kneading chamber having a feed opening and the last kneading chamber having a discharge opening, to give raw mixtures, and the raw mixtures are kneaded and degassed in a reciprocating kneader in a second process stage.
US07671122B2
A process of producing a wax composition mainly comprising a wax, including the step of mixing the wax and a component to be mixed with the wax by applying an external force at a temperature lower than the melting completion temperature of the wax.
US07671114B2
In accordance with the present invention, it has now been found that glycidyl epoxy resins containing substitution on the epoxide ring can be used with conventional epoxy curing agents and fluxing agents to produce underfill adhesives that are suitable for use with silver-based alloys. Owing to the structural similarity of the new materials to conventional epoxy resins, physical and material properties of the invention formulations are altered little, if at all, relative to products currently in use, and so are highly compatible with existing processes.
US07671108B2
A printing ink including 100 parts by weight of an aluminum foil, 3 to 200 parts by weight of a binder polymer, and 600 to 2500 parts by weight of a solvent, wherein the aluminum foil contains aluminum foils with thicknesses of 0.03 μm or less and foil surface areas of 1.5 μm2 to 1500 μm2 in an amount of 80% or more based on an accumulated foil surface area, and having a viscosity of 1000 to 3000 cps (measured at 20° C. with a BM-type rotational viscometer) to keep a clearance on a thin outline with a width of 0.15 mm, and a printed matter printed on a surface of a transparent substrate with the ink and viewed as a front face opposite the printed face thereof.
US07671107B2
It has been discovered that an initiation reaction is efficiently progressed to a propagation reaction by adding a compound that potentially or directly generates a carbocation to the polymerization system of a cationic ring-opening polymerizable compound, and thus the activation of polymerization is rendered. Namely, the present invention relates to a cationic polymerizable resin composition which is characterized by comprising (A) a compound having at least one functional group capable of cationic ring-opening polymerization in one molecular chain, (B) a cationic polymerization initiator, and (C) a compound to generate a carbocation by the action of active species generated from (B) the cationic polymerization initiator by electromagnetic wave or particle beam. According to the present invention, it has been discovered that the initiation reaction is efficiently progressed to the propagation reaction by adding the compound that potentially or directly generates a carbocation to the polymerization system of the cationic ring-opening polymerizable compound, and thus the activation of polymerization is rendered.
US07671085B2
The efficient regulation of cholesterol synthesis, metabolism, acquisition, and transport is an essential component of lipid homeostasis. The farnesoid X receptor (FXR) is a transcriptional sensor for bile acids, the primary product of cholesterol metabolism. Accordingly, the development of potent, selective, small molecule agonists, partial agonists, and antagonists of FXR would be an important step in further deconvoluting FXR physiology. In accordance with the present invention, the identification of novel potent FXR activators is described. Two derivatives of invention compounds, bearing stilbene or biaryl moieties, contain members that are the most potent FXR agonists reported to date in cell-based assays. These compounds are useful as chemical tools to further define the physiological role of FXR as well as therapeutic leads for the treatment of diseases linked to cholesterol, bile acids and their metabolism and homeostasis.
US07671079B2
The present invention provides a compound of formula I and the use thereof in the therapeutic treatment of a CNS disorder related to or affected by the 5-HT6 receptor.
US07671073B2
The present invention is directed to novel cyclohexylalanine derivatives which are inhibitors of the dipeptidyl peptidase-IV enzyme (“DP-IV inhibitors”) and which are useful in the treatment or prevention of diseases in which the dipeptidyl peptidase-IV enzyme is involved, such as diabetes and particularly type 2 diabetes. The invention is also directed to pharmaceutical compositions comprising these compounds and the use of these compounds and compositions in the prevention or treatment of such diseases in which the dipeptidyl peptidase-IV enzyme is involved.
US07671066B2
The invention relates to inhibitors of the phosphodiesterase 4 (PDE4) enzyme. More particularly, the invention relates to compounds that are derivatives of 1-phenyl-2-pyridynyl alkylene alcohols, methods of preparing such compounds, compositions containing them and therapeutic use thereof.
US07671051B2
The present invention relates to compounds with the formula (I) and also to pharmaceutical compositions comprising the compounds, as well as to the use of the compounds in medicine and for the preparation of a medicament which acts on the human 11-β-hydroxysteroid dehydrogenase type 1 enzyme.
US07671050B2
The compounds of formula (I) in which R1, R2 and R3 have the meanings as given in the description are novel effective PDE2 inhibitors.
US07671048B2
The present invention is concerned with a method of treating a disease selected from the group consisting of cognitive disorders, anxiety, Alzheimer's disease, and schizophrenia comprising administering a therapeutically effective amount of a substituted imidazo[1,5-a][1,2,4]triazolo[1,5-d][1,4]benzodiazepine derivatives of the following formula wherein R1 is halogen, lower alkyl, lower alkynyl, cycloalkyl, lower alkoxy, OCF3, —NHR, —NHC(O)R or —NHSO2R; R2 is hydrogen, methyl or aryl which is unsubstituted or substituted by one or two substituents selected from the group consisting of halogen and lower alkoxy; R3 is hydrogen, lower alkyl, lower alkenyl, cycloalkyl, lower alkoxy, —O(CH2)n+1—O-lower alkyl, —(CH2)n-aryl which is optionally substituted by lower alkyl or halogen, heteroaryl, —NHR, —N(R)2, wherein each R can be the same or different, —NHCH2C≡CH, or pyrrolidin-1-one; R is hydrogen, lower alkyl, lower alkyl substituted by halogen, heteroaryl, —(CH2)nO-lower alkyl, —NH-lower alkyl, cycloalkyl or aryl, and n is 0, 1, 2 or 3; and with their pharmaceutically acceptable acid addition salts. The invention also provides novel compounds of formula I-A and pharmaceutical compositions containing them. The most preferred indication is Alzheimer's disease.
US07671044B2
The present invention refers to a pharmaceutical formulation characterized in that it includes mainly clobetasolpropionate, minoxidil and 11 alpha hydroxyprogesterone as main active principles, besides other excipients, vitamins and/or minerals, and to its use in the treatment of skin diseases, mainly in the symptomatic treatment of psoriasis.
US07671032B2
Peptidomimetic compounds are described which inhibit the NS3 protease of the hepatitis C virus (HCV). The compounds have the formula where the variable definitions are as provided in the specification. The compounds comprise a carbocyclic P2 unit in conjunction with a novel linkage to those portions of the inhibitor more distal to the nominal cleavage site of the native substrate, which linkage reverses the orientation of peptidic bonds on the distal side relative to those proximal to the cleavage site.
US07671016B2
The invention concerns a cell support comprising an RGD-enriched gelatine that has a more even distribution of RGD sequences than occurring in a natural gelatine and with a minimum level of RGD sequences. More precise the percentage of RGD sequences related to the total number of amino acids is at least 0.4 and if the RGD-enriched gelatine comprises 350 amino acids or more, each stretch of 350 amino acids contains at least one RGD motif. Preferably the RGD-enriched gelatines are prepared by recombinant technology, and have a sequence that is derived from a human gelatine or collagen amino acid sequence. The invention also relates to RGD-enriched gelatines that are used for attachment to integrins. In particular The RGD-enriched gelatines of the invention are suitable for coating a cell culture support for growing anchor-dependant cell types. Further, the RGD-enriched gelatines of the invention may find use in medical applications, in particular as a coating on implant or transplant material or as a component of drug delivery systems.
US07671013B2
The present invention relates to the use of coagulation proteins and complexes thereof with anticoagulation proteins for the lysis of blood clots or other applications affected by accelerated plasmin production. More specifically, the present invention provides a method for accelerating the dissolution of a blood clot through the administration of at least one coagulation protein, with or without being in complex with a serpin, comprising a basic C-terminal amino acid, wherein the coagulation protein may be a derivative of Factor X or Factor V or a combination thereof. Pharmaceutical compositions for the treatment and prophylaxis of blood clots are also provided, wherein, the methods and products of the present invention advantageously accelerate clot dissolution while potentially minimizing the adverse side-effects, such as hemorrhaging, seen with other clot dissolving agents. The present invention also provides a method for detecting a fibrinolytic potential in a subject.
US07670999B2
A cleansing composition comprising (1) at least one foaming surfactant, (2) at least 1% by weight of at least one hydrophilic silica, relative to the total weight of the composition, and (3) at least one oxyalkylenated compound in a physiologically acceptable aqueous medium comprising at least 35% by weight of water, relative to the total weight of the composition.
US07670998B2
A cosmetic product (1) for conditioning hair, the cosmetic product having the form of a solid and comprising at least one hair conditioning ingredient. Cocoa butter, cetearyl alcohol (and) sodium lauryl sulfate and glyceryl stearate (and) PEG 100 stearate are used to form the solid and the at least one hair conditioning ingredient is a known hair conditioning ingredient, such as lanolin and cetrimonium bromide. The solid cosmetic product may combined in a bar or a small shape (3) with shampoo (2).
US07670989B2
An absorbent and process for the neutralization and absorption of acidic and alkaline liquid spills comprising a mixture of superabsorbent polymer, a styrene-butadiene-styrene block copolymer, sodium bicarbonate, and optionally a chlorine neutralizer. The absorbent preferably also contains a chlorine neutralizer for the neutralization of any chlorine vapors and a pH indicator to indicate that the spill has been neutralized and is safe for handling and disposal.
US07670986B2
A manganese dioxide catalyst for hydrolysing organic nitrites which bear readily oxidizable groups such as thiol or thioether groups to the corresponding carboxamides, and to a process for preparing the catalyst and to its use for hydrolysing organic nitrites.
US07670979B2
A porous refractory product includes a matrix of sintered silicon carbide having a porosity of about 45% to about 65%. The matrix is formed by heating in a noble gas atmosphere a cast preform including a mixture of alpha-silicon carbide and boron carbide each having a particle size of less than about 1 micron. The heating causes the formation of gaseous SiO within the silicon carbide matrix, which, in turn, forms pores having an average size of less than about 1 micron. The porous refractory products herein are suitable for use in a variety of applications including for use in high temperature particulate filtering applications.
US07670975B2
To provide an alkali free glass which is suitable as a glass substrate for LCD and has few defects of bubbles and an undissolved starting material, and a process for producing an alkali free glass which can readily lower the defects in bubbles and an undissolved starting material.An alkali free glass with a matrix composition comprising SiO2, Al2O3, B2O3, MgO, CaO, SrO and BaO and containing substantially no alkali metal oxide, of which the temperature at which the viscosity becomes 102 dPa·s, is at most 1,600° C. and which contains sulfur in an amount of from 0.001 to 0.1% as calculated as SO3, as represented by the mass percentage, per 100% of the total amount of the above matrix composition, and a process for producing a glass which comprises preparing a starting material and melting it so that a sulfate be incorporated to the starting material in an amount of from 0.01 to 5% as calculated as SO3, as represented by the mass percentage, per 100% of the total amount of the above matrix composition.
US07670956B2
A method and apparatus for local beam processing using a beam activated gas to etch material are described. Compounds are disclosed that are suitable for beam-induced etching. The invention is particularly suitable for electron beam induced etching of chromium materials on lithography masks. In one embodiment, a polar compound, such as ClNO2 gas, is activated by the electron beam to selectively etch a chromium material on a quartz substrate. By using an electron beam in place of an ion beam, many problems associated with ion beam mask repair, such as staining and riverbedding, are eliminated. Endpoint detection is not critical because the electron beam and gas will not etch significantly the substrate.
US07670953B2
The present invention provides a method to pattern a substrate which features creating a multi-layered structure by forming, on the substrate, a patterned layer having protrusions and recessions. Formed upon the patterned layer is a conformal layer, with the multi-layered structure having a crown surface facing away from the substrate. Portions of the multi-layered structure are removed to expose regions of the substrate in superimposition with the protrusions, while forming a hard mask in areas of the crown surface in superimposition with the recessions.
US07670950B2
A method for metallizing a through silicon via feature in a semiconductor integrated circuit device substrate comprising immersing the semiconductor integrated circuit device substrate into an electrolytic copper deposition composition comprising a source of copper ions, an organic sulfonic acid or inorganic acid, or one or more organic compounds selected from among polarizers and/or depolarizers, and chloride ions.
US07670931B2
Methods for fabricating semiconductor structures with backside stress layers are provided. In one exemplary embodiment, the method comprises the steps of providing a semiconductor device formed on and within a front surface of a semiconductor substrate. The semiconductor device comprises a channel region. A plurality of dielectric layers is formed overlying the semiconductor device. The plurality of dielectric layers comprises conductive connections that are in electrical communication with the semiconductor device. A backside stress layer is formed on a back surface of the semiconductor substrate. The backside stress layer is configured to apply to the channel region of the semiconductor device a uniaxial compressive or tensile stress that, with stresses applied by the plurality of dielectric layers, results in an overall stress exerted on the channel region to achieve a predetermined overall strain of the channel region.
US07670930B2
A method of fabricating a thin film from a substrate includes implantation into the substrate, for example made of silicon, of ions of a non-gaseous species, for example gallium, the implantation conditions and this species being chosen, according to the material of the substrate, so as to allow the formation of precipitates confined in a certain depth, distributed within a layer, these precipitates being made of a solid phase having a melting point below that of the substrate. The method optionally further including intimate contacting of this face of the substrate with a stiffener, and detachment of a thin film by fracturing the substrate at the layer of precipitates by applying a mechanical and/or chemical detachment stress under conditions in which the precipitates are in the liquid phase.
US07670927B2
A semiconductor structure and method of fabricating the structure. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then formed in the upper wafer to devices in the lower wafer and wiring levels are formed on the upper wafer. The lower wafer may include wiring levels. The lower wafer may include landing pads for the contacts. Contacts to the silicon layer of the lower wafer may be silicided.
US07670919B2
An article includes a top electrode that is embedded in a solder mask. An article includes a top electrode that is on a core structure. A process of forming the top electrode includes reducing the solder mask thickness and forming the top electrode on the reduced-thickness solder mask. A process of forming the top electrode includes forming the top electrode over a high-K dielectric that is in a patterned portion of the core structure.
US07670914B2
Methods are provided for the fabrication of multiple finger transistors. A method comprises forming a layer of gate-forming material overlying a semiconductor substrate and forming a layer of dummy gate material overlying the layer of gate-forming material. The layer of dummy gate material is etched to form a dummy gate and sidewall spacers are formed about sidewalls of the dummy gate. The dummy gate is removed and the layer of gate-forming material is etched using the sidewall spacers as a mask to form at least two gate electrodes.
US07670907B2
A hard mask layer is formed and patterned overlying a semiconductor substrate of a semiconductor device. The patterned hard mask layer exposes two or more areas of the substrate for future isolation regions of the semiconductor device. Portions of the substrate are removed in the areas for future isolation regions, thereby forming two or more trenches. A second mask layer is formed overlying a first portion of the hard mask layer and at least one first trench, and a second portion of the hard mask layer and at least one second trench are left uncovered. Additional substrate material is removed from the at least one second trench so that the at least one second trench is deeper than the at least one first trench. The hard mask layer and the second mask are removed substantially concurrently.
US07670898B2
The invention includes methods of incorporating partial SOI into transistor structures. In particular aspects, dielectric material is provided over semiconductor material, and patterned into at least two segments separated by a gap. Additional semiconductor material is then grown over the dielectric material and within the gap. Subsequently, a transistor is formed to comprise source/drain regions within the additional semiconductor material, and to comprise a channel between the source/drain regions. At least one of the source/drain regions is primarily directly over a segment of the dielectric material, and the channel is not primarily directly over any segment of the dielectric material. The invention also includes constructions comprising partial SOI corresponding to segments of dielectric material, and transistors having at least one source/drain region primarily directly over a segment of dielectric material, and a channel that is not primarily directly over any segment of the dielectric material.
US07670887B2
A field-effect transistor includes source, drain, and gate electrodes; a crystalline or polycrystalline layer of inorganic semiconductor; and a dielectric layer. The layer of inorganic semiconductor has an active channel portion physically extending from the source electrode to the drain electrode. The inorganic semiconductor has a stack of 2-dimensional layers in which intra-layer bonding forces are covalent and/or ionic. Adjacent ones of the layers are bonded together by forces substantially weaker than covalent and ionic bonding forces. The dielectric layer is interposed between the gate electrode and the layer of inorganic semiconductor material. The gate electrode is configured to control a conductivity of an active channel part of the layer of inorganic semiconductor.
US07670882B2
A system performs a method including contact printing one of a wetting agent and a non-wetting agent on a semiconductor and inkjet printing an electrically conductive material proximate said one of the wetting agent and the non-wetting agent.
US07670874B2
A method involves plating pillars of electrically conductive material up from a seed layer located on a substrate, surrounding the pillars with a fill material so that the pillars and fill material collectively define a first package, and removing the substrate from the first package.
US07670873B2
A method of flip-chip mounting can reliably and stably mount a semiconductor chip to a mounting substrate while avoiding problems such as damage to the semiconductor chip due to a difference in thermal expansion coefficients between the semiconductor chip and the mounting substrate. The method of flip-chip mounting a semiconductor chip supports a mounting substrate on a stage in a state where a resin material has been supplied onto a chip mounting surface of the mounting substrate and presses the semiconductor chip toward the mounting substrate using a pressure/heat applying head to bond the semiconductor chip to the mounting substrate and thermally harden the resin material. A concave part is provided in a support surface of the stage that supports the semiconductor chip, and the semiconductor chip is bonded to the mounting substrate by pressing the semiconductor chip toward the mounting substrate using the pressure/heat applying head in a state where the mounting substrate is bent toward the concave part.
US07670869B2
A memory device is disclosed. A pillar structure comprises a first electrode layer, a dielectric layer overlying the first electrode layer, and a second electrode layer overlying the dielectric layer. A phase change layer covers a surrounding of the pillar structure. A bottom electrode electrically connects the first electrode layer of the pillar structure. A top electrode electrically connects the second electrode layer of the pillar structure.
US07670866B2
One embodiment includes a substrate having a plurality of dies and a support frame made of molding material which is molded between adjacent dies so as to join together and support adjacent dies. The embodiment further has a plurality of interconnects formed on selected die terminals and the molding material of the support frame joining adjacent dies. The interconnects may be formed utilizing a variety of techniques including those of the type used in conventional wafer fabrication techniques. Other embodiments are described and claimed.
US07670865B2
An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N− region formed within a P-type region. The N− region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.
US07670863B2
Provided is a method of fabricating a complementary metal oxide silicon image sensor. The method includes: applying a passivation oxide and a passivation nitride after forming a pad; selectively removing the passivation nitride in a pad region and a pixel region by a photolithography process, and performing a first cleaning process; performing a hydrogen anneal process; opening the pad by removing the passivation oxide in the pad region and performing a second cleaning process; applying a pad protective layer; performing a color filter array process, a planarization process, and a microlens process after the applying of the pad protective layer; and removing the pad protective layer in the pad region.
US07670861B2
The objects of the present invention are to form MEMS structures of which stress is controlled while maintaining the performance of high-performance LSI, to integrate MEMS Structures and LSI on a single chip, to electrically and chemically protect the MEMS structure and to reduce the stress of the whole movable part of the MEMS structure. To achieve the above objects, a silicide film formable at a low temperature is used for the MEMS structure. The temperature at the silicide film deposition T1 is selected optionally with reference the heat treatment temperature T2 and the pseudo-crystallization temperature T3. T2, the temperature of manufacturing process after the silicide film deposition, is determined does not cause the degradation of the characteristics of the high-performance LSI indispensable. Thus, the residual stress of the MEMS structures may be controlled.
US07670860B2
A method of manufacturing a semiconductor device, the semiconductor device comprising: a semiconductor substrate; a pixel portion including an in-layer lens; and a peripheral circuit portion including a metal wiring portion, the pixel portion and the peripheral circuit portion being on the semiconductor substrate, the method comprising: forming an insulating film in the pixel portion and the peripheral circuit portion, so as to cover the metal wiring portion; providing, on the insulating film, a lens material layer for forming the in-layer lens; forming a resist layer for etching the lens material layer; curing the resist layer; and forming a first region and a second region in the resist layer, wherein a portion of the resist layer in the first region is thicker than that of the resist layer in the second region, the first region being in the peripheral circuit portion and the second region being in the pixel portion.
US07670855B2
The present invention features peptides of a PorB polypeptide, which PorB peptides are useful in production of antibodies that bind the full-length PorB polypeptide and as a therapeutic agent. In specific embodiments the invention features a composition comprising one or more PorB peptides (other than a full-length PorB polypeptide), which peptides contain at least one epitope that can elicit Chlamydia-neutralizing antibodies. The invention also features methods for induction of a protective immune response against infection by Chlamydia and Chlamydiophila.
US07670850B2
The present invention relates to assay methods used for detecting the presence of PIF, and to PIF peptides identified using this assay. In particular, the present invention relates to flow cytometry assays for detecting PIF. It is based, at least in part, on the observation that flow cytometry using fluorescently labeled anti-lymphocyte and anti-platelet antibodies demonstrated an increase in rosette formation in the presence of PIF. It is further based on the observation that flow cytometry demonstrated that monoclonal antibody binding to CD2 decreased in the presence of PIF. The present invention further relates to PIF peptides which, when added to Jurkat cell cultures, have been observed to either (i) decrease binding of anti-CD2 antibody to Jurkat cells; (ii) increase expression of CD2 in Jurkat cells; or (iii) decrease Jurkat cell viability. In additional embodiments, the present invention provides for ELISA assays which detect PIF by determining the effect of a test sample on the binding of anti-CD2 antibody to a CD2 substrate.
US07670849B2
The invention is directed to a method of detecting a biological substance in the nasal secretion and diagnosing a disease following the detection of the biological substance wherein the biological substance is not related to a respiratory disease. The invention also provides treatment of the diseases following the detection of the biological substance and/or diagnosis of the disease. In some embodiments, the diseases are cancer, hepatitis, smell loss, taste loss, diabetes, and leprosy. The invention also provides a kit for diagnosing a disease.The present invention includes methods of analyzing samples from the nose for the detection of biological substances. In particular, nasal secretion or nasal mucus is collected and analyzed for biological substances. The results of this analysis are then suitable for use in diagnosis, prognosis, and determination of suitability of therapeutic interventions.
US07670847B2
The invention includes an enantioselective indicator-displacement assay useful to determine enantiomeric excess (ee) enantiomeric samples colorimetrically. Determination may be by inspection of color with the naked eye, spectrographic measurement, or mathematical calculation. Concentration may also be determined. The assay may involve two independent absorption measurements. On suitable group of enantiomeric molecules to be assayed include α-hydroxy acids. The inherent relationship between the absorbance of the indicator-displacement ensemble and the overall concentration and ee of the analyte is established through solution equilibria. The invention also includes use of the assay in drug screening and manufacturing, high throughput screening of catalysts and kits for use in conducting assays of the invention.
US07670844B2
A device and a method for measuring viscosity that includes attaching molecular rotors to a solid surface, exposing the solid surface to a fluid having a viscosity to be measured, and taking optical measurements to determine viscosity. The solid surface is preferably quartz, polystyrene or silicate glass, such as a fiber optic probe or a glass cuvette. The molecular rotors are of the type that includes an electron-donor group and electron-acceptor group that are linked by a single bond so that the groups may rotate with respect to one another, and that exhibit a fluorescence emission when rotation is hindered.
US07670840B2
The present invention provides novel methods and compositions for the diagnosis, prognosis and treatment of pancreatic cancer. The invention also provides methods of identifying anti-pancreatic cancer agent.
US07670835B2
The invention relates to the field of diagnosis of and vaccination against Streptococcal infections and to the detection of virulence markers of Streptococci. The invention discloses a method for modulating virulence of a Streptococcus, the method comprising modifying a genomic fragment of Streptococcus wherein the genomic fragment comprises at least a functional part of a fragment identifiable by hybridization in Streptococcus suis to a nucleic acid or fragment thereof as shown in FIG. 5.
US07670820B2
Disclosed herein are novel chitinase polypeptides and nucleic acids encoding the polypeptides. Also disclosed are related vectors, host cells, compositions, and uses.
US07670817B2
This invention relates generally to the treatment of cathepsin or dynamin mediated diseases, such as proteinuria, cancer, and cognitive disease and related products. Diagnostic and other assays are also provided, as well as methods for podocyte cell gene transfer.
US07670814B2
The present invention provides a process for the production of vitamin C from a substrate, such as for instance L-sorbosone using a microorganism belonging to the genus Ketogulonicigenium.
US07670810B2
This invention provides methods of amplifying genomic DNA to obtain an amplified representative population of genome fragments. Methods are further provided for obtaining amplified genomic DNA representations of a desired complexity. The invention further provides methods for simultaneously detecting large numbers of typable loci for an amplified representative population of genome fragments. Accordingly the methods can be used to genotype individuals on a genome-wide scale.
US07670808B2
This invention provides for an improved generation of novel nucleic acid modifying enzymes. The improvement is the fusion of a sequence-non-specific nucleic-acid-binding domain to the enzyme in a manner that enhances the ability of the enzyme to bind and catalytically modify the nucleic acid.
US07670803B2
The present invention provides a protein having saponin-decomposing activity, more specifically a protein which can decompose a glycoside having soyasapogenol B as an aglycone to produce soyasapogenol B, a polynucleotide encoding such a protein, and a method of producing soyasapogenol B on a large scale using the same. A protein according to the present invention are concerned with (a), (b) or (c), namely (a) a protein comprising an amino acid sequence selected from the group consisting of the amino acid sequences shown in SEQ ID NOs: 2, 4, and 6; (b) a protein that has at least 50% homology to the protein comprising the amino acid sequence of the sequence described in (a) and having saponin-decomposing activity; or (c) a protein comprising a modified amino acid sequence of the sequence described in (a) that has one or more amino acid residues deleted, substituted, inserted, or added and having saponin-decomposing activity.
US07670800B2
The invention relates to a process for the purification of riboflavin comprising the steps of (a) precipitating a first crystalline form of riboflavin, (b) isolating the first crystalline form of riboflavin, (c) transforming the first crystalline form of riboflavin into a second crystalline form of riboflavin under conditions that decompose diluted DNA, and (d) isolating the second crystalline form of riboflavin, provided that at ambient temperature the first crystalline form of riboflavin is thermodynamically less stable than the second crystalline form of riboflavin.
US07670796B2
An assay to detect a metalloprotease in a sample, comprising contacting the sample with a substrate. The metalloprotease reacts with the substrate to form a product comprising a tag. This is followed by selectively binding the tag to a solid phase, wherein the solid phase comprises a binding partner for the tag. Measuring the mass of the product takes place to determine the presence of the metalloprotease in the sample.
US07670794B2
Methods for monitoring and managing glycemia status in a diabetic patient are disclosed. The methods comprise measuring in a diabetic patient, serum concentrations of HbA1c, glucose and inorganic phosphate and comparing the measured concentrations with reference concentrations. An equation representing the reference relationship of HbA1c, glucose and inorganic phosphate is also provided.
US07670791B1
The disclosure concerns a method for the suppression of visceral pain by regulating the T-type calcium channel; a visceral pain inhibitor that includes a T-type calcium channel inhibitor as an effective ingredient; and a method of screening a visceral pain inhibitor by investigating the suppression activity of T-type calcium channels. Particularly, the present invention relates to a method for the suppression of visceral pain by regulating an alpha 1G T-type calcium channel in the central nervous system and alpha 1H and alpha 1I T-type calcium channels in the peripheral nervous system; a visceral pain inhibitor that includes a T-type calcium channel inhibitor as an effective ingredient; and a method of screening a visceral pain inhibitor by investigating the suppression activity of T-type calcium channels. The method of the present invention can be effectively used to suppress visceral pain by regulating T-type calcium channel in a precise mechanism without any side effects.
US07670778B2
The invention provides novel lin-8, lin-56, and lin-61 genes and polypeptides involved in cell fate determination and in cell proliferation. In addition, the invention includes mutants of these three genes, as well as methods for utilizing these genes, and their encoded polypeptides, in diagnosing and treating abnormal cell proliferation.
US07670775B2
Methods of identifying malignant thyroid tissue comprising testing a thyroid tissue sample for the expression of at least two genes chosen from CCND2, PCSK2, and PLAB. Kits for use in the disclosed methods are also provided.
US07670773B2
The invention is a novel MECP2E1 splice variant and its corresponding polypeptide. The invention also includes methods of using these nucleic acid sequences and proteins in medical diagnosis and treatment of neuropsychiatric disorders or development disorders.
US07670768B1
Processes for isolating, amplifying, and characterizing DNA from biological materials are provided. DNA is isolated by contacting a biological material on a solid support which is preferably pre-treated with a lysing reagent. The isolation process is simple and efficient and provides a source of purified DNA without the use of harmful organic solvents such as urea and guanidine-based solvents. The purified DNA and remaining fractions of biological material may be characterized or amplified as necessary.
US07670758B2
Films for optical use, articles containing such films, methods for making such films, and systems that utilize such films, are disclosed.
US07670749B2
A method for the formation of a patterned resist layer on a substrate surface by patternwise irradiation with actinic radiation. The first step of the method is formation of a coating layer comprising a substituted triphenylene compound having a diameter of between 1 and 3 nm, a sensitizer which increases the sensitivity of the exposed layer to the actinic radiation used in a subsequent irradiation step and a cross-linker on the substrate surface. Subsequently the coating layer is irradiated patternwise, and unirradiated areas of the coating layer are removed. A resist material comprising a solution of: (i) as the principal resist material a triphenylene derivative having a diameter of from 1 to 3 rim, (ii) a sensitizer which increases the sensitivity of the resist material to actinic radiation, and (iii) a cross-linker capable of cross-linking molecules of the triphenyl derivative, the cross-linker optionally being constituted by a moiety attached to the triphenylene derivative.
US07670746B2
A positive photosensitive composition comprises: (A) 5 to 20 parts by weight of the total amount of at least one compound that generates an acid upon irradiation with an actinic ray; and (B) 100 parts by weight of the total amount of at least one fluorine atom-containing resin having a group that increases a solubility of the resin in an alkaline developer by the action of an acid.
US07670745B2
The invention provides an alkali soluble polymer including a specific vinylketone phenol and a derivative thereof as radical polymerizable monomers and a positive working photosensitive resin composition containing the alkali soluble polymer and a photosensitizing agent. According to the invention, there can be provided an alkali soluble resin having high solvent resistance, high water resistance, high acid resistance, high alkali resistance, high thermal resistance, high transparency, excellent adhesiveness with a substrate, and the like and useful for the formation of a patterned resin film obtained by developing in an aqueous alkali solution and a positive working photosensitive resin composition including such an alkali soluble resin.
US07670744B2
First toner of the present invention includes colored particles and an external additive. The colored particles are produced by heating and aggregating a mixture that includes a resin particle dispersion in which first resin particles are dispersed and a pigment particle dispersion in which pigment particles are dispersed, so that at least part of the first resin particles is melted. The colored particles have a finely roughened surface. Second toner of the present invention includes aggregated particles including at least first resin particles and pigment particles, and colored particles having a finely roughed surface formed by fusing at least part of wax and at least part of second resin particles on the surface of the aggregated particles. Third toner of the present invention includes aggregated particles including at least first resin particles and pigment particles, and colored particles having a finely roughened surface formed by fusing at least part of third resin particles and at least part of fourth resin particles on the surface of the aggregated particles. When the aggregated particles are formed in an aqueous medium, the pH is controlled in the specified range. The toner can achieve oilless fixing that prevents offset without using oil while maintaining high OHP transmittance. Therefore, it is possible to eliminate the spent of toner components on a carrier and to make the life longer. Moreover, thinning or scattering during transfer can be suppressed, thus ensuring high transfer efficiency.
US07670742B2
It is an object of the present invention to provide a recording material which contains at least a colorant and a resin wherein the colorant contains silver, and a toner which contains at least a colorant and a resin wherein the colorant is an alloy containing silver, zinc and aluminum.
US07670739B2
A photoconductor that includes a supporting substrate, and an active layer in contact with the substrate, and which layer contains at least one photogenerating pigment, at least one charge transport component, and a mixture of a metal oxide and a chelating agent of a tetrafluorodihydroxyanthraquinone.
US07670732B2
An image forming method includes: by using a plurality of liquid developers having different colors, forming a plurality of single color images corresponding to the colors; transferring a non-fixed color image onto a recording medium; and fixing the non-fixed color image onto the recording medium. In the image forming method, each of the liquid developers includes an insulting liquid containing unsaturated fatty acid components and toner particles dispersed in the insulating liquid, and an oxidation polymerization accelerator that accelerates an oxidation polymerization reaction of the unsaturated fatty acid components during fixation is contained in the liquid developer forming the single color image that is positioned closest to the recording medium among the plurality of single color images forming the non-fixed color image.
US07670731B2
A method for improving the uniformity of a lithographic process. In one aspect, the probability density function of a first and second lithographic apparatus are matched by providing a continuous z-motion to a stage in the first lithographic apparatus during substrate exposure. Preferably, the z-motion is characterized by a normally distributed function, wherein the effective probability density function of the first apparatus is substantially similar to the probability density function of the second apparatus.
US07670721B2
Methods of manufacture and use of phosphates of transition metals are described as positive electrodes for secondary lithium batteries, including a process for the production of LiMPO4 with controlled size and morphology, M being FexCoyNizMnw, where 0≦x≦1, 0≦y≦1, 0≦w≦1, and x+y+z+w=1. According to an exemplary embodiment, a process is described for the manufacture of LiFePO4 including the steps of providing an equimolar aqueous solution of Li1+, Fe3+ and PO43−, evaporating water from the solution to produce a solid mixture, decomposing the solid mixture at a temperature of below 500° C. to form a pure homogeneous Li and Fe phosphate precursor, and annealing the precursor at a temperature of less than 800° C. in a reducing atmosphere to produce the LiFePO4 powder. The obtained powders can have a particle size of less than 1 μm, and can provide superior electrochemical performance when mixed for an appropriate time with an electrically conductive powder.
US07670717B2
To provide a non-aqueous secondary battery having a capacity as high as that of a conventional battery using a conventional resin separator and achieving excellent overcharge characteristics and excellent resistance to external short-circuit, a combined electrode plate for a spirally-wound electrode group for a non-aqueous secondary battery including a current collector, an active material layer carried on the current collector and a multi-layer porous membrane carried on the active material layer is used. The multi-layer porous membrane includes a first porous membrane and a second porous membrane. The first porous membrane contains metal oxide particles and a first binder. The second porous membrane contains resin particles and a second binder. The thickness of the multi-layer porous membrane is preferably 15 to 25 μm.
US07670709B2
The invention is drawn to a gasket (34) for use in an individual fuel cell (20). The gasket (34) includes at lest one generally rigid bridge (44) or (46) that extends across the fluid flow channels in adjacent separator plates (38) and (40). The bridge (44) or (46) assures that the fluid flow channels are not blocked or restricted in the cell (20). Each bridge (44) or (46) may be integral with its corresponding gasket (34). The gasket (34) may be a multi-piece gasket with a carrier material having an elastrometric seal portion (74) secured to it.
US07670706B2
A fuel cartridge (1) includes a fuel storage container (2), and a fuel supply port (4) for taking out a fuel stored in the fuel storage container (2). The fuel supply port (4) is provided with a fuel supply port protecting mechanism. The fuel supply port protecting mechanism includes a door (10) for opening/closing an opening (11) provided between the fuel supply port (4) and an outside, and a lock mechanism (20) for locking the door (10) so that the door (10) does not open. This can prevent, with the fuel cartridge not installed on a fuel cell, the leakage of a fuel from the fuel cartridge caused by improper handling by a user, etc.
US07670703B2
The solid oxide fuel cell can comprise: an electroconductive and porous reformer including a catalytically active material and shaped to constitute a solid slab having a first surface and a second surface opposite the first surface, and a plurality of adjacent grooves along the first surface, and flat regions adjacent the plurality of grooves; an anode layer covering the plurality of grooves of the reformer slab and having a corresponding grooved shape; an electrolyte layer covering the anode layer over the plurality of grooves of the reformer slab and having a corresponding grooved shape, and extending over the flat regions; and a cathode layer covering the electrolyte layer over the grooves of the reformer slab and having a corresponding grooved shape.
US07670700B2
A fuel cell system, control method and current measuring device for a power unit are disclosed. The fuel cell system includes a fuel cell having local areas, a current measuring device associated with at least one of the local areas to measure localized current related to a specified operating characteristic, and a control section for diagnosing an operating condition of the fuel cell in response to localized current to enable optimum control of the fuel cell depending upon a specified operating characteristic determined by localized current. The control method controls the operating condition of the fuel cell in response to localized current indicative of the specified operating characteristic of the fuel cell. The current measuring device includes an electrical conductor formed with a recessed portion, a localized current conductor received in the recessed portion, and a current sensor for detecting current flowing across the localized current conductor.
US07670699B2
A simple, inexpensive and highly efficient fuel cell has boundary structures made of a photo-sensitive material in combination with selective patterning. Printed circuit board (PCB) fabrication techniques combine boundary structures with two and three dimensional electrical flow path. Photo-sensitive material and PCB fabrication techniques are alternately or combined utilized for making micro-channel structures or micro stitch structures for substantially reducing dead zones of the diffusion layer while keeping fluid flow resistance to a minimum. The fuel cell assembly is free of mechanical clamping elements. Adhesives that may be conductively contaminated and/or fiber-reinforced provide mechanical and eventual electrical connections, and sealing within the assembly. Mechanically supporting backing layers are pre-fabricated with a natural bend defined in combination with the backing layers' elasticity to eliminate massive support plates and assist the adhesive bonding. Proton insulation between adjacent and electrically linked in-plane cell elements is provided by structural insulation within the central membrane.
US07670697B2
A fuel cell system has at least one fuel cell unit for generating electrical energy, a unit for storing or dispensing electrical energy, an electrical consumer for consuming electrical energy, a diagnostic unit for ascertaining a functional capability of the at least one fuel cell unit during a diagnosis phase, and a control unit for determining an electrical power generated at least during the diagnosis phase by the at least one fuel cell unit.
US07670691B2
A cyclometalated transition metal complex emitting phosphorescence of high efficiency and an organic electroluminescent display device employing the same are provided. The cyclometalated transition metal complex is represented by Formula I: {[C ^N]mM[P(R1R2)][LR3R4]n}z (I). The cyclometalated transition metal complex can be employed in an organic film of an organic electroluminescent display device, can emit light at a wavelength range of 400 nm to 650 nm, and can emit white light as well when used with a green light emitting material and a red light emitting material.
US07670687B2
The present invention relates to a biaxially oriented polyester film, which a) has a base layer B, which includes a yellow dye and a red dye, b) has, on each side of the base layer B, at least one layer (A or C) which includes, based on the weight of layer A or C, less than 0.01% by weight of the yellow dye and less than 0.01% by weight of the red dye, and c) the film has one absorption maximum lying at from 400 to 500 nm in the UV/visible spectrum from 400 to 800 nm. Preferred dyes are anthraquinone dyes and perinone dyes; the polyester is preferably PET. After metallization or lamination, the film has a gold appearance, and is a suitable packaging material.
US07670681B2
A material composite has at least one region of copper or a copper alloy, at least one region of a predominantly graphitic material, and at least one boundary region between them. The boundary region has one or more carbides from the group of the IVb, Vb, VIb transition metals and one or more elements of the group consisting of Si, B, Al, Ge, Mn, Sn. In a preferred implementation of the invention, the composite is produced with a back-casting process.
US07670677B2
A latently crimpable conjugate fiber is constructed using a first component containing an ethylene-α-olefin copolymer polymerized with a metallocene catalyst and a second component formed from a thermal plastic polymer having a melting point T2 higher than a melting point T1 of the first component, such that the first component is exposed with an exposed length of at least 20% relative to a peripheral length of the fiber, and which fiber has a single fiber dry heat shrinkage percentage of at least 50%, which is determined according to JIS-L-1015 (dry heat shrinkage percentage) at 100° C. under an initial tension of 0.018mn/dtex (2mg/d) for 15 minutes and a single fiber dry heat shrinkage percentage of at least 15%, which is determined under the same condition under an initial tension of 0.450mN/dtex (50mg/dtex) for 15 minutes. The latently crimpable conjugate fiber develops crimps and has thermal adhesiveness at a low temperature.
US07670667B2
The invention relates to a biaxially oriented polyester film having at least one base layer (B) which includes from 0.25 to <1.0% by weight of SiO2 and from 0.25 to <1.0% by weight of TiO2. The invention further relates to a process for the production of the film and to its use. The inventive film features characteristic surfaces and defined optical properties, and has good suitability for use in the industrial sector.