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公开(公告)号：US20250068494A1
公开(公告)日：2025-02-27
申请号：US18808258
申请日：2024-08-19
Applicant: Aveva Software, LLC
Inventor： Peter Burgardt , William Bielke
IPC: G06F11/00
Abstract: Forecasting industrial asset failures is described. A system determines a data start value associated with an industrial asset at a data start time. The system determines a data end value associated with the industrial asset at a data end time. The system estimates a failure time when a trend projected from the data start value through the data end value will reach a failure limit value. The system determines a distance to failure based on the failure limit value and the data end value. The system outputs a failure forecast, associated with the failure time and the distance to failure, for the industrial asset.
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公开(公告)号：US12235773B2
公开(公告)日：2025-02-25
申请号：US17158095
申请日：2021-01-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Joseph Zbiciak , Son H. Tran
IPC: G06F12/1045 , G06F7/24 , G06F7/487 , G06F7/499 , G06F7/53 , G06F7/57 , G06F9/30 , G06F9/32 , G06F9/345 , G06F9/38 , G06F9/48 , G06F11/00 , G06F11/10 , G06F12/0862 , G06F12/0875 , G06F12/0897 , G06F12/1009 , G06F17/16 , H03H17/06 , G06F15/78
Abstract: A streaming engine employed in a digital data processor specifies a fixed read only data stream. An address generator produces virtual addresses of data elements. An address translation unit converts these virtual addresses to physical addresses by comparing the most significant bits of a next address N with the virtual address bits of each entry in an address translation table. Upon a match, the translated address is the physical address bits of the matching entry and the least significant bits of address N. The address translation unit can generate two translated addresses. If the most significant bits of address N+1 match those of address N, the same physical address bits are used for translation of address N+1. The sequential nature of the data stream increases the probability that consecutive addresses match the same address translation entry and can use this technique.
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3.发明授权公开(公告)号：US12235744B2
公开(公告)日：2025-02-25
申请号：US18135639
申请日：2023-04-17
Applicant: Commvault Systems, Inc.
Inventor： Rajesh Polimera , Sarath Cheriyan Joseph , Kuldeep Kumar , Venkata Chalapathi Sucheth Ramgiri , Ashwin Gautamchand Sancheti , Madhumitha Mani , Henry Wallace Dornemann
Abstract: Snapshot-based disaster recovery (DR) orchestration systems and methods for virtual machine (VM) failover and failback do not require that VMs or their corresponding datastores be actively operating at the DR site before a DR orchestration job is initiated, i.e., before failover. An illustrative data storage management system deploys proprietary components at source data center(s) and at DR site(s). The proprietary components (e.g., storage manager, data agents, media agents, backup nodes, etc.) interoperate with each other and with the source and DR components to ensure that VMs will successfully failover and/or failback. DR orchestration jobs are suitable for testing VM failover scenarios (“clone testing”), for conducting planned VM failovers, and for unplanned VM failovers. DR orchestration jobs also handle failback and integration of DR-generated data into the failback site, including restoring VMs that never failed over to fully re-populate the source/failback site.
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公开(公告)号：US12235733B2
公开(公告)日：2025-02-25
申请号：US18690985
申请日：2022-05-18
Applicant: Klemens Schweppenhauser
Inventor： Moritz Schweppenhauser
Abstract: Data backup method, wherein the method comprises the following method steps: switching on an energy supply of a first data storage element of a data backup device by means of a control unit of the data backup device, activating a processing unit by means of the control unit, setting up a data connection between the processing unit and the first data storage element, setting up a data connection between the processing unit and a data memory, querying the data memory by means of the processing unit, storing the data queried from the data memory on the data storage element by means of the processing unit, deactivating the processing unit, switching off an energy supply of the first data storage element by means of the control unit, and data backup device for such a method.
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公开(公告)号：US12235715B2
公开(公告)日：2025-02-25
申请号：US18408740
申请日：2024-01-10
Applicant: BANK OF AMERICA CORPORATION
Inventor： Ashok Kumar , Narsing Raj , Venkata Lakshmi Sai Siva Kumar Devulapalli
Abstract: Systems, computer program products, and methods are described herein for early detection of operational failure in component-level functions within a computing environment. The present invention is configured to receive, from one or more source devices, log data; determine, using a trained machine learning model, a likelihood that a first subset of the log data is associated with an operational failure of one or more component-level functions; determine that the likelihood that the first subset of the log data is associated with the operational failure of one or more component-level functions is greater than a predetermined threshold; determine that the first subset of the log data reflects a current state of a first subset of source devices; generate a notification indicating that the first subset of source devices is likely to experience the operational failure of one or more component-level functions; and display the notification on an administrator device associated with the first subset of source devices.
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Patent Agency Ranking
公开(公告)号：US12229000B2
公开(公告)日：2025-02-18
申请号：US18207525
申请日：2023-06-08
Applicant: Micron Technology, Inc.
Inventor： Kishore Kumar Muchherla , Shane Nowell , Mustafa N. Kaynak , Sampath K. Ratnam , Peter Feeley , Sivagnanam Parthasarathy , Devin M. Batutis , Xiangang Luo
Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including detecting a read error with respect to data residing in a first block of the memory device, wherein the first block is associated with a voltage offset bin; determining a most recently performed error-handling operation performed on a second block associated with the voltage offset bin; and performing the error-handling to recover the data.
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公开(公告)号：US12222844B2
公开(公告)日：2025-02-11
申请号：US18113934
申请日：2023-02-24
Applicant: ADVANTEST CORPORATION
Inventor： Srdjan Malisic , Chi Yuan
Abstract: Embodiments of the present invention can provide an extended NVMe driver that supports exercising virtual functions (and related physical functions) of a DUT without using a VM or hypervisor. In this way, the amount of memory and processing resources used for testing NVMe SSDs can be significantly reduced, and a large number of DUTs (e.g., up to 16 DUTs) can be tested in parallel independently. In other words, each DUT is tested in isolation, as if is the only device being tested, and there are no race conditions or competition for resources between workloads during testing.
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公开(公告)号：US12222827B2
公开(公告)日：2025-02-11
申请号：US17898824
申请日：2022-08-30
Applicant: NetApp, Inc.
Inventor： Ardalan Kangarlou
Abstract: Systems and methods for an improved High-Availability (HA) resource reservation approach are provided. According to one embodiment, for a given cluster of greater than two nodes in which a number (f) of concurrent node failures are to be tolerated, more efficient utilization of resources for an HA system may be achieved by distributing HA reserved capacity across more than f nodes of the cluster rather than naively concentrating the HA reserved capacity in f nodes. As node failures are not a common occurrence, those of the nodes of the cluster having HA reserved capacity may allow for some bursting of one or more units of compute executing thereon unless or until f concurrent node failures occur, thereby promoting more efficient utilization of node resources.
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9.发明授权公开(公告)号：US12222804B2
公开(公告)日：2025-02-11
申请号：US18271437
申请日：2022-02-28
Inventor： Xinliang Zhang
Abstract: The present disclosure discloses an encoding and decoding method, apparatus and device based on an erasure pool, and a computer readable storage medium. The method includes: storing, upon receiving original data that needs to be subjected to data encoding and decoding, the original data into a shared memory; sending an encoding and decoding signal to an encoding and decoding process, so that the encoding and decoding process obtains the original data from the shared memory after receiving the encoding and decoding signal, and calls a hard codec plug-in to perform a hard encoding and decoding operation; controlling, if the hard encoding and decoding operation fails, the encoding and decoding process to call a soft codec plug-in to perform a soft encoding and decoding operation; and obtaining, after the encoding and decoding process completes the encoding and decoding operation, an encoding and decoding result from the shared memory.
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公开(公告)号：US12222800B2
公开(公告)日：2025-02-11
申请号：US18348416
申请日：2023-07-07
Applicant: International Business Machines Corporation
Inventor： Nikolaos Papandreou , Timothy J. Fisher , Roman Alexander Pletka , Charalampos Pozidis , Radu Ioan Stoica , Aaron Daniel Fry , Andrew D. Walls
Abstract: A technique for writing data to pages in a QLC block of a QLC NAND flash memory device, where the device comprises a plurality of SLC pages organized in SLC blocks and a plurality of QLC pages organized in QLC blocks. The technique comprises storing received data in SLC pages, dividing equally a QLC block in a predefined number of sub-blocks according to a corresponding QLC page health status of the pages of the QLC block. Upon determining that SLC pages are to be copied from SLC pages to QLC pages, copying device-internal the respective SLC pages to the sub-blocks of the QLC block using device-internal cache registers, where the copying is based on an error-count aware scheme.
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