公开(公告)号：US20030015938A1

公开(公告)日：2003-01-23

申请号：US10150548

申请日：2002-05-17

Applicant: STMicroelectronics S.r.l.

Inventor： Luca Battaglin ,  Pietro Gallina ,  Giancarlo Saba ,  Giancarlo Zinco ,  Claudio Diazzi ,  Vittorio Peduto

IPC: H03K004/94

CPC classification number: H03K17/162 ,  H01L41/042 ,  H03K4/94 ,  H03K2217/0036

Abstract: A circuit for driving capacitive loads in a highly efficient manner. In one embodiment, a drive portion is connected to at least one end of a capacitive electric load being applied a voltage waveform. The embodiment further comprises a switching circuit portion having its output connected to the above one end of the capacitive load in order to supply a fraction of the overall current demanded by the load. Additionally, a switching circuit and accompanying switching method provide for efficiently supplying peak current to the capacitive load during voltage fluctuation in the voltage waveform. Briefly, the invention is a circuit arrangement aimed at providing a highly efficient drive for the capacitive load, using a combined linear/switching setup and without distorting the quality of the waveform generated across the capacitive load.

Abstract translation: 用于以高效的方式驱动电容性负载的电路。 在一个实施例中，驱动部分连接到施加电压波形的电容性电负载的至少一端。 该实施例还包括开关电路部分，其输出连接到电容性负载的上述一端，以便提供负载所需的总电流的一部分。 此外，开关电路和伴随的开关方法提供在电压波形的电压波动期间有效地向电容性负载提供峰值电流。 简而言之，本发明是一种电路装置，其目的在于提供使用组合线性/开关设置的电容性负载的高效率驱动，并且不会使电容性负载上产生的波形的质量失真。

公开(公告)号：US20030006810A1

公开(公告)日：2003-01-09

申请号：US10160238

申请日：2002-06-04

Inventor： Katsumi Miyazaki

IPC: H03K004/94

CPC classification number: H03K17/166

Abstract: Charge accumulated at an output node of an output transistor is discharged to the ground through the output transistor as a spike current. To reduce noise of the spike current, a control signal is sent from an output transistor driving circuit set to a low impedance to the output transistor in a first driving stage to quickly turn on the output transistor, a control signal is sent from the output transistor driving circuit set to a high impedance to the output transistor in a second driving stage to output the spike current through the output transistor at a fixed rate, and a control signal is sent from the output transistor driving circuit set to a low impedance to the output transistor in a third driving stage to quickly discharge all the charge. Therefore, a time-current characteristic of the spike current is set almost in a trapezoid shape, and both a spike current peak value and a spike current occurrence time period in the spike current can be sufficiently lowered.

公开(公告)号：US20020140465A1

公开(公告)日：2002-10-03

申请号：US10052981

申请日：2001-11-08

Inventor： Junichi Nagata ,  Akio Kojima

IPC: H03K004/94

CPC classification number: H03K17/16 ,  H03K4/94 ,  H03K17/04126 ,  H03K2217/0036

Abstract: The present invention discloses an output circuit, by which it is possible to reduce power consumption while maintaining maximum voltage value to be outputted at high level. In this output circuit, a charge-and-discharge circuit uses a terminal voltage Vc of a capacitor as a trapezoidal wave voltage, and a drive circuit drives an output transistor based on the terminal voltage Vc, and a voltage Vo equal to the terminal voltage Vc is outputted to the load. A voltage detection circuit detects an emitter voltage (VcnullVF) of the transistor and generates an electric current proportional to the terminal voltage Vc. This electric current is turned to a base current of the output transistor via a variable current circuit. Therefore, a base current proportional to the output voltage Vo is supplied to the output transistor.

Abstract translation: 本发明公开了一种输出电路，通过该输出电路可以在保持最高电压值以高电平输出的同时降低功耗。 在该输出电路中，充放电电路使用电容器的端子电压Vc作为梯形波电压，驱动电路基于端子电压Vc驱动输出晶体管，并且将电压Vo等于端子电压 Vc被输出到负载。 电压检测电路检测晶体管的发射极电压（Vc + VF），并产生与端子电压Vc成比例的电流。 该电流通过可变电流电路转换为输出晶体管的基极电流。 因此，与输出电压Vo成比例的基极电流被提供给输出晶体管。