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公开(公告)号:US20240365266A1
公开(公告)日:2024-10-31
申请号:US18765276
申请日:2024-07-07
Applicant: Skylo Technologies, Inc.
Inventor: Meghna Agrawal , Andrew Nuttall
CPC classification number: H04W56/0045 , G04R20/04 , H04W56/006
Abstract: Apparatuses, methods, and systems for estimating a propagation time between a first node and a second node of a wireless network are disclosed. One method includes determining a first time propagation delay between the first node and the second node based on location of the second node and the kinematic information of a third node, receiving, by the second node, a packet containing a timestamp representing a transmit time of the packet, determining a second time propagation delay between the first node and the second node based upon the difference between the reception time of the packet, and the first time stamp included within the packet, transmitting, by a second node a TX packet after a holding delay based on the first propagation delay and the second propagation delay.
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公开(公告)号:US20240028541A1
公开(公告)日:2024-01-25
申请号:US18478152
申请日:2023-09-29
Applicant: Juniper Networks, Inc.
Inventor: John B. KENNEY , Kamatchi S. GOPALAKRISHNAN , Jack W. KOHN , Sushma B. BAVACHE , Amit VERMA , Rafik P.
CPC classification number: G06F13/382 , G06F13/4282 , G04R20/04 , G06F2213/0042
Abstract: In some implementations, a device may receive, via a universal serial bus (USB) interface, configuration information and a supply of power from a network device. The device may receive, via an antenna that is external to the device, a first signal indicating timing information. The device may generate, based on the first signal, a second signal and a third signal, wherein the second signal comprises a one pulse per second signal and the third signal comprises a ten-megahertz signal. The device may provide, to the network device, the second signal and the third signal. The device may receive, via an input port, a clock signal to provide an extended holdover functionality to the network device.
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公开(公告)号:US20230370984A1
公开(公告)日:2023-11-16
申请号:US17742071
申请日:2022-05-11
Applicant: Hughes Network Systems, LLC
Inventor: Nimesh AMBESKAR , Jack LUNDSTEDT , Yogesh SETHI , Patrick O'NEIL , Tyler HORWAT
CPC classification number: H04W56/0015 , H04W56/005 , G04R20/04
Abstract: Communication systems and methods are disclosed herein. In an embodiment, a communication system includes a grandmaster clock and a modem unit. The grandmaster clock is configured to output a primary clock reference based on a received signal. The modem unit is configured for communication with a remote terminal. The modem unit includes a network clock configured to be tuned based on the primary clock reference. The network clock is further configured to output a first signal to be used for a time reference for communications with the remote terminal. The modern unit also includes a master clock configured to be tuned based on the primary clock reference. The master clock is further configured to output a second signal to be used for a frequency reference for communications with the remote terminal.
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公开(公告)号:US11816051B1
公开(公告)日:2023-11-14
申请号:US17662773
申请日:2022-05-10
Applicant: Juniper Networks, Inc.
Inventor: John B. Kenney , Kamatchi S. Gopalakrishnan , Jack W. Kohn , Sushma B. Bavache , Amit Verma , Rafik P.
CPC classification number: G06F13/382 , G04R20/04 , G06F13/4282 , G06F2213/0042
Abstract: In some implementations, a device may receive, via a universal serial bus (USB) interface, configuration information and a supply of power from a network device. The device may receive, via an antenna that is external to the device, a first signal indicating timing information. The device may generate, based on the first signal, a second signal and a third signal, wherein the second signal comprises a one pulse per second signal and the third signal comprises a ten-megahertz signal. The device may provide, to the network device, the second signal and the third signal. The device may receive, via an input port, a clock signal to provide an extended holdover functionality to the network device.
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公开(公告)号:US11770200B2
公开(公告)日:2023-09-26
申请号:US17096851
申请日:2020-11-12
Applicant: Beijing Tusen Zhitu Technology Co., Ltd.
Inventor: Mingbao Zhang , Pingyuan Ji
CPC classification number: H04J3/065 , G01S19/14 , G01S19/256 , G01S19/37 , G04R20/04
Abstract: The present disclosure provides an on-board synchronization device. The on-board synchronization device includes: a first circuit and at least one second circuit. The first circuit is configured to receive an initial signal containing Universal Time Coordinated (UTC), generate a first signal containing the UTC, and output the first signal to at least one on-board device, such that the at least one on-board device synchronizes its built-in clock with the UTC based on the first signal. The second circuit is configured to receive a Pulse Per Second (PPS) signal, generate a periodic second signal with a same phase as the PPS signal, and output the second signal or the PPS signal to the at least one on-board device, such that the at least one on-board device performs a predetermined action based on the second signal or the PPS signal.
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公开(公告)号:US11726434B2
公开(公告)日:2023-08-15
申请号:US16139245
申请日:2018-09-24
Applicant: CASIO COMPUTER CO., LTD.
Inventor: Takeshi Matsue , Tatsuya Sekitsuka
CPC classification number: G04R20/04 , G01S19/256
Abstract: A satellite radiowave receiving device includes a receiver receiving radiowaves transmitted from a positioning satellite; and a processor performing a positioning operation using the radiowaves received by the receiver. If the receiver starts receiving radiowaves for the positioning operation, the processor obtains date and time information based on radiowaves received from a single positioning satellite after the receiver starts receiving radiowaves. The processor preforms a positioning calculation using the obtained date and time information and preliminarily retained positional information on the positioning satellite.
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公开(公告)号:US11703812B2
公开(公告)日:2023-07-18
申请号:US16585039
申请日:2019-09-27
Applicant: CASIO COMPUTER CO., LTD.
Inventor: Hayato Hori , Shuto Oikawa
Abstract: A timepiece includes a clock circuit, a signal receiver configured to receive signals including time information, a processor configured to control a changing operation of changing a current time measured by the clock circuit based on the time information obtained from the signal receiver and controls a presenting operation of whether or not the changing operation is successful. The processor controls the changing operation based on a first flag indicating whether or not the signal receiver successfully receives the time information. The processor controls the presenting operation based on a second flag indicating whether or not the changing operation is successful within a predetermined period of time.
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公开(公告)号:US11703811B2
公开(公告)日:2023-07-18
申请号:US16584989
申请日:2019-09-27
Applicant: Seiko Epson Corporation
Inventor: Toshihiro Mitani
Abstract: An electronic timepiece prevents the internal time from shifting because time information for correcting the internal time cannot be received. The electronic timepiece includes: a timekeeper; a receiver; an operating device; an automatic reception controller; a time adjuster; and a reception setter configured to selectively set a first automatic reception prohibition mode that prohibits operation of the automatic reception controller and is cancelled by a single operation of the operating device, and a second automatic reception prohibition mode that prohibits operation of the automatic reception controller and is cancelled by a specific operation of the operating device that is different from the operation that cancels the first automatic reception prohibition mode.
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公开(公告)号:US11507030B2
公开(公告)日:2022-11-22
申请号:US16124237
申请日:2018-09-07
Applicant: CASIO COMPUTER CO., LTD.
Inventor: Yuki Oshita , Katsuhiko Obata , Akihiro Kuroha
IPC: G04R20/04 , G04G21/04 , G01R31/3835 , G04B47/06
Abstract: A timepiece including a GPS receiver that receives a radio wave from a positioning satellite, a time counter that performs a time count operation, and a processor, the processor being configured to: corrects a time count of the time counter in accordance with time and date information included in the radio wave from the positioning satellite received by the GPS receiver; acquires a temperature in the timepiece; acquires a voltage of a battery; and controls a receive operation at the GPS receiver in accordance with the temperature and the voltage.
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公开(公告)号:US20220206444A1
公开(公告)日:2022-06-30
申请号:US17135484
申请日:2020-12-28
Applicant: Waymo LLC
Inventor: Axel Simon , Zhuyuan Liu
IPC: G04R20/04
Abstract: Example embodiments relate to GNSS time synchronization in redundant systems. A redundant system configured with two subsystems may initially synchronize clocks from both subsystems to GNSS time from a GNSS receiver. The synchronization of the first subsystem's clock may involve using a first communication link that enables communication between the first subsystem and the GNSS receiver while the synchronization of the second subsystem's clock may involve using both the first communication link and a second communication link that enables communication between the subsystems. The redundant system may then synchronize the first subsystem's clock to the second subsystem's clock while the second subsystem's clock is still synchronized to GNSS time from the GNSS receiver based on timepulses traversing a pair of wires that connect the subsystems and the GNSS receiver.
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