公开(公告)号：US20170134851A1

公开(公告)日：2017-05-11

申请号：US15321716

申请日：2015-06-11

Applicant: ams AG

Inventor： Helmut THEILER

IPC: H04R3/00 ,  H03F3/217 ,  H03F3/183 ,  H04R5/04 ,  H01R24/58

CPC classification number: H04R3/00 ,  G06F1/266 ,  H01R24/58 ,  H01R2107/00 ,  H03F3/183 ,  H03F3/217 ,  H03F2200/03 ,  H04R5/04 ,  H04R29/00 ,  H04R2420/01 ,  H04R2420/05 ,  H04R2420/09

Abstract: A host interface for a media device comprises a first and a second host audio terminal for receiving a first and a second analog audio signal, a first and a second connector audio terminal for connecting a first and a second pole of a four-pole connector, and a host control circuit. The host control circuit is adapted to detect whether a device requiring a supply signal over the four-pole connector is connected. If no such device is detected, the first and the second analog audio signal are passed to the first and the second connector audio terminal. If such a device is detected, the first connector audio terminal is connected to a supply terminal.

公开(公告)号：US20210175897A1

公开(公告)日：2021-06-10

申请号：US17052461

申请日：2019-04-29

Applicant: ams AG

Inventor： Helmut THEILER ,  Herbert LENHARD

IPC: H03M3/00

Abstract: The invention relates to an analog-to-digital converter, ADC, based on single-bit delta-sigma quantization. The ADC includes an integrator, a threshold detector, a feedback block, a range control circuit and an output processing block. The ADC is configured to, based on its own generated digital bitstream, adjust the magnitude of a subtrahend signal in order to achieve autonomous auto-ranging of the ADC during the integration time of a measurement. In particular, the auto-ranging allows for the efficient conversion of an analog input signal with high dynamic range, for example ambient light, to a digital output signal.

公开(公告)号：US20170195785A1

公开(公告)日：2017-07-06

申请号：US15418559

申请日：2017-01-27

Applicant: ams AG

Inventor： Helmut THEILER

IPC: H04R3/00 ,  H04R1/10 ,  H04L7/00 ,  H04R29/00

CPC classification number: H04R3/005 ,  H04J7/00 ,  H04L7/0008 ,  H04L7/10 ,  H04R1/1008 ,  H04R1/1041 ,  H04R1/1075 ,  H04R1/1083 ,  H04R29/001 ,  H04R2201/107 ,  H04R2420/07 ,  H04R2420/09 ,  H04R2460/01

Abstract: A set of headphones includes a connector with a first connection contact and a second connection contact as well as a loudspeaker, which is connected to the first connection contact in order to supply a loudspeaker signal. The set of headphones also includes a first and a second digital microphone, each of which is set up to generate a digital microphone signal, in particular with a binary bit stream. A multiplexer, which is coupled, at an output, to the second connection contact, is set up to generate a coded multiplex signal at the output on the basis of the microphone signals.

公开(公告)号：US20200284651A1

公开(公告)日：2020-09-10

申请号：US16758112

申请日：2018-10-22

Applicant: ams AG

Inventor： Helmut THEILER ,  Bernhard GREIMEL-LÄNGAUER

IPC: G01J1/44 ,  G01J1/42

Abstract: A sensor arrangement comprises an integrator with an integrator input, a sensor coupled to the integrator input, a balancing current generator coupled to the integrator input and a compensation current generator coupled to the integrator input.

公开(公告)号：US20170288728A1

公开(公告)日：2017-10-05

申请号：US15514483

申请日：2015-08-21

Applicant: ams AG

Inventor： Horst GETHER ,  Helmut THEILER

IPC: H04B3/54 ,  H04M1/725 ,  H04M1/60

CPC classification number: H04B3/54 ,  H04M1/6058 ,  H04M1/72527

Abstract: A host interface circuit operates in a power mode when connected to an accessory device compatible with a power supply via a first line of a data cable. During power mode, the host interface circuit couples a power regulator to the first line. The host interface circuit operates in a legacy mode when connected to an accessory device not compatible with such a power supply and couples the legacy terminal to the first line during legacy mode. An accessory interface circuit configured to operate in a power mode when connected to a host device capable of a power supply via a first line couples a power input of an active device to the first line and a data input of the active device to a second line during power mode.

公开(公告)号：US20160080141A1

公开(公告)日：2016-03-17

申请号：US14785621

申请日：2014-04-09

Applicant: AMS AG

Inventor： Helmut THEILER ,  Alexander COSTA

IPC: H04L7/06 ,  H04L5/14

CPC classification number: H04L7/06 ,  H04B5/0031 ,  H04L5/1423 ,  H04L7/007 ,  H04L7/033 ,  H04L12/10

Abstract: A communication system has a host communication circuit and a client communication circuit, which are connected to each other by means of a single signal wire. The host communication circuit generates a voltage modulated signal on the signal wire based on a reference clock signal, which in each clock cycle has a first period with a significant voltage change based on a clock edge of the reference clock signal, and a second period with a basically constant voltage variation. The host communication circuit (HCC) further can demodulate a current modulated signal received via the signal wire from the client communication circuit. The client communication circuit is configured to detect the significant voltage change in order to generate respective sync pulses in a sync signal, which is used to generate a client clock signal. A current modulation is performed by the client communication circuit based on the data to be transmitted a predetermined settling time after one of the sync pulses until the respective following sync pulse.

Abstract translation: 通信系统具有通过单个信号线彼此连接的主机通信电路和客户端通信电路。 主机通信电路基于参考时钟信号在信号线上产生电压调制信号，该参考时钟信号在每个时钟周期中具有基于参考时钟信号的时钟沿具有显着电压变化的第一周期，以及具有 基本上恒定的电压变化。 主机通信电路（HCC）还可以解调来自客户端通信电路的经由信号线接收的当前调制信号。 客户端通信电路被配置为检测有效的电压变化，以便在用于产生客户时钟信号的同步信号中产生相应的同步脉冲。 由客户端通信电路根据要在其中一个同步脉冲之后发送预定的建立时间的数据直到相应的后续同步脉冲来执行当前调制。