公开(公告)号：US06531865B1

公开(公告)日：2003-03-11

申请号：US09741626

申请日：2000-12-19

Applicant: Zhihong Mai ,  Seok Hiong Tan ,  Seck June Foo

Inventor： Zhihong Mai ,  Seok Hiong Tan ,  Seck June Foo

IPC: G01R3128

CPC classification number: G01R31/2831 ,  G01R31/2853

Abstract: A test circuit for and method of testing integrated circuit packages can be utilized to determine the existence of one or more short circuits between adjacent connectors. The system includes an interface configured to electrically connect the conductors of the integrated circuit package. The interface groups the conductors into a plurality of nodes. The number of nodes is no more than one-half the number of conductors. A control circuit is coupled to the interface. The control circuit determines the existence of one or more short circuits between adjacent conductors in response to signals on the nodes.

Abstract translation: 可以使用用于测试集成电路封装的测试电路和方法来确定相邻连接器之间的一个或多个短路的存在。 该系统包括被配置为电连接集成电路封装的导体的接口。 接口将导体分成多个节点。 节点数量不超过导体数量的一半。 控制电路耦合到接口。 响应于节点上的信号，控制电路确定相邻导体之间的一个或多个短路的存在。