公开(公告)号：US20100193847A1

公开(公告)日：2010-08-05

申请号：US12362743

申请日：2009-01-30

申请人： Zhi-Xiong Jiang ,  Kyuhwan H. Chang ,  Kiwoon Kim

发明人： Zhi-Xiong Jiang ,  Kyuhwan H. Chang ,  Kiwoon Kim

IPC分类号： H01L29/78 ,  H01L21/283 ,  H01L21/336 ,  H01L29/43

CPC分类号： H01L29/7833 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/6659

摘要： A semiconductor fabrication process for forming a gate electrode for a metal-oxide-semiconductor (MOS) transistor includes forming a gate electrode layer of an electrically conductive ceramic, e.g., titanium nitride, overlying a gate dielectric layer, e.g., a high K dielectric. A gate barrier layer is then formed overlying the gate electrode layer. The gate barrier layer may be a metal or transition metal material including, as an example, titanium. Portions of the gate electrode layer and the gate barrier layer are then etched or otherwise removed to form the gate electrode.

摘要翻译： 用于形成用于金属氧化物半导体（MOS）晶体管的栅极的半导体制造工艺包括形成覆盖在栅介质层（例如高K电介质）上的诸如氮化钛的导电陶瓷的栅极电极层。 然后形成覆盖栅极电极层的栅极阻挡层。 栅极阻挡层可以是金属或过渡金属材料，其包括例如钛。 然后蚀刻或以其它方式去除栅极电极层和栅极阻挡层的部分以形成栅电极。