公开(公告)号：US08422620B2

公开(公告)日：2013-04-16

申请号：US12607156

申请日：2009-10-28

申请人： Kuo-Chang Su ,  Tsung-Ting Tsai ,  Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Kuo-Chang Su ,  Tsung-Ting Tsai ,  Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register is provided and includes a first shift registering unit and a second shift registering unit. The first shift registering unit generates a first trigger signal at a first output terminal and includes a first pull-down circuit. The second shift registering unit receives the first trigger signal and generates a second trigger signal at a second output terminal. The first trigger signal and the second trigger signal are sequentially asserted. The second shift registering unit includes a second pull-down circuit. The first pull-down circuit and the second pull-down circuit perform pull-down operations at different times. When the first pull-down circuit does not perform the pull-down operation, the second pull-down circuit performs pull-down operations to the first output terminal.

摘要翻译： 提供一个移位寄存器，包括一个第一移位寄存单元和一个第二移位寄存单元。 第一移位寄存单元在第一输出端产生第一触发信号，并包括第一下拉电路。 第二移位寄存单元接收第一触发信号并在第二输出端产生第二触发信号。 第一触发信号和第二触发信号被依次断言。 第二移位登记单元包括第二下拉电路。 第一下拉电路和第二下拉电路在不同时间执行下拉操作。 当第一下拉电路不执行下拉操作时，第二下拉电路对第一输出端子执行下拉操作。

公开(公告)号：US08411007B2

公开(公告)日：2013-04-02

申请号：US12660315

申请日：2010-02-23

申请人： Yung-Chih Chen ,  Yu-Chung Yang ,  Kun-Yueh Lin ,  Chun-Hsin Liu

发明人： Yung-Chih Chen ,  Yu-Chung Yang ,  Kun-Yueh Lin ,  Chun-Hsin Liu

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2300/0814 ,  G09G2300/0852 ,  G09G2300/0876 ,  G09G2310/0251 ,  G09G2320/0242 ,  G09G2320/028

摘要： A pixel in a liquid crystal display panel comprises a first sub-pixel area having a first sub-pixel electrode and a second sub-pixel area having a second sub-pixel electrode. Each sub-pixel electrode is associated with a capacitor. When a gate-line signal and a data voltage is provided to the pixel, the voltage level on the first sub-pixel electrode is substantially equal to or slightly higher than the voltage level on the second sub-pixel electrode and the capacitor associated with each sub-pixel electrode is charged. When the gate-line signal has entirely passed on partially passed, a circuit element causes the capacitor associated with the second sub-pixel electrode to transfer its charge to another capacitor, resulting in a reduction of the voltage level on the second sub-pixel electrode.

摘要翻译： 液晶显示面板中的像素包括具有第一子像素电极的第一子像素区域和具有第二子像素电极的第二子像素区域。 每个子像素电极与电容器相关联。 当向像素提供栅极线信号和数据电压时，第一子像素电极上的电压电平基本上等于或略高于第二子像素电极和与每个子像素电极相关联的电容器的电压电平 子像素电极被充电。 当栅极线信号完全通过时，电路元件使与第二子像素电极相关联的电容器将其电荷转移到另一个电容器，导致第二子像素电极上的电压电平降低 。

公开(公告)号：US08325127B2

公开(公告)日：2012-12-04

申请号：US12823237

申请日：2010-06-25

申请人： Chun-Huan Chang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Chun-Huan Chang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G06F3/038 ,  G11C19/00

CPC分类号： G11C19/287 ,  G09G3/20 ,  G09G3/3677 ,  G09G2310/0205 ,  G09G2310/0281 ,  G09G2310/0286 ,  G09G2310/0297 ,  G09G2310/06

摘要： The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively.

摘要翻译： 本发明涉及一种显示面板中的移位寄存器和GOA结构，包括基板和空间上形成在衬底上的多个像素，其限定多个像素行，每个像素行具有高度H.移位寄存器 具有多个移位寄存器级，以这样的方式在基板上空间和顺序地布置，使得每个移位寄存器级的布局具有（j * H）的高度，j是大于1的整数。 每个移位寄存器级被配置为分别产生用于驱动j个相邻像素行的j个扫描信号。

公开(公告)号：US20110316833A1

公开(公告)日：2011-12-29

申请号：US12823237

申请日：2010-06-25

申请人： Chun-Huan Chang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Chun-Huan Chang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G06F3/038 ,  G11C19/00

CPC分类号： G11C19/287 ,  G09G3/20 ,  G09G3/3677 ,  G09G2310/0205 ,  G09G2310/0281 ,  G09G2310/0286 ,  G09G2310/0297 ,  G09G2310/06

摘要： The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively.

摘要翻译： 本发明涉及一种显示面板中的移位寄存器和GOA结构，包括基板和空间上形成在衬底上的多个像素，其限定多个像素行，每个像素行具有高度H.移位寄存器 具有多个移位寄存器级，以这样的方式在基板上空间和顺序地布置，使得每个移位寄存器级的布局具有（j * H）的高度，j是大于1的整数。 每个移位寄存器级被配置为分别产生用于驱动j个相邻像素行的j个扫描信号。

公开(公告)号：US20090243981A1

公开(公告)日：2009-10-01

申请号：US12185821

申请日：2008-08-05

申请人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Po-Yuan Liu ,  Min-Feng Chiang

发明人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Po-Yuan Liu ,  Min-Feng Chiang

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/006 ,  G09G2330/08

摘要： A driving module drives a display device having a plurality of pixel switches. The driving module includes a gate driving circuit, a plurality of switch components, and a shorting line. The gate driving circuit includes a plurality of output ends correspondingly coupled to the plurality of the pixel switches through a plurality of gate lines for outputting a plurality of gate driving signals and turning on the plurality of the pixel switches. The plurality of the gate lines are coupled to the shorting line through the switch components. Each control end of the switch components is coupled to the gate driving circuit for receiving the gate driving signals in order to refresh the state of the switch components.

摘要翻译： 驱动模块驱动具有多个像素开关的显示装置。 驱动模块包括栅极驱动电路，多个开关部件和短路线。 栅极驱动电路包括通过多条栅极线对应地耦合到多个像素开关的多个输出端，用于输出多个栅极驱动信号并导通多个像素开关。 多个栅极线通过开关部件耦合到短路线。 开关部件的每个控制端耦合到栅极驱动电路，用于接收栅极驱动信号，以刷新开关部件的状态。

公开(公告)号：US08456454B2

公开(公告)日：2013-06-04

申请号：US12488946

申请日：2009-06-22

申请人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Tsung-Ting Tsai ,  Kuo-Chang Su

发明人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Tsung-Ting Tsai ,  Kuo-Chang Su

IPC分类号： G06F3/038 ,  G09G5/00 ,  G02F1/1333

CPC分类号： G09G3/3677 ,  G09G2300/0426 ,  G09G2330/08 ,  G09G2330/12

摘要： A display panel is disclosed, which includes a substrate, a shift register array, plural scan lines, a compensating circuit, a first repair line, and a second repair line. The shift register array having plural shift registers is disposed on a non-display area of the substrate. The scan lines connect to the shift registers respectively to drive plural display units. The first repair line and the second repair line are connected to the compensating circuit and bridged over two ends of each scan line in the non-display area, respectively.

摘要翻译： 公开了一种显示面板，其包括基板，移位寄存器阵列，多条扫描线，补偿电路，第一修复线和第二修复线。 具有多个移位寄存器的移位寄存器阵列设置在基板的非显示区域上。 扫描线分别连接到移位寄存器以驱动多个显示单元。 第一修理线和第二修复线分别连接到补偿电路并桥接在非显示区域中的每条扫描线的两端。

公开(公告)号：US08175215B2

公开(公告)日：2012-05-08

申请号：US12572247

申请日：2009-10-01

申请人： Chun-Hsin Liu ,  Tsung-ting Tsai ,  Kuo-Chang Su ,  Yung-Chih Chen

发明人： Chun-Hsin Liu ,  Tsung-ting Tsai ,  Kuo-Chang Su ,  Yung-Chih Chen

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register includes multiple cascade-connected stages. Each stage generates an output signal in response to a clock signal and a first control signal. Each stage includes a pull-up module, a pull-up driving module, a first pull-down module, a second pull-down module, and a third pull-down module. The pull-up module is used for providing the output signal based on the clock signal. The pull-up driving module turns on the pull-up module in response to a first control signal. The first pull-down module adjusts voltage level on the first node to a first supply voltage in response to a second control signal. The second pull-down module adjusts voltage level on the output end to a second supply voltage in response to the second control signal. The third pull-down module adjusts voltage level on the second node to a third supply voltage in response to a third control signal.

摘要翻译： 移位寄存器包括多个级联连接级。 每一级响应于时钟信号和第一控制信号产生输出信号。 每个级包括上拉模块，上拉驱动模块，第一下拉模块，第二下拉模块和第三下拉模块。 上拉模块用于根据时钟信号提供输出信号。 上拉驱动模块响应于第一控制信号而导通上拉模块。 第一下拉模块响应于第二控制信号将第一节点上的电压电平调整到第一电源电压。 第二下拉模块响应于第二控制信号将输出端上的电压电平调整到第二电源电压。 第三下拉模块响应于第三控制信号将第二节点上的电压电平调整到第三电源电压。

公开(公告)号：US08049828B2

公开(公告)日：2011-11-01

申请号：US12178662

申请日：2008-07-24

申请人： Chun-Hsin Liu ,  Yung-Chih Chen ,  Po-Yuan Liu ,  Tsung-Ting Tsai

发明人： Chun-Hsin Liu ,  Yung-Chih Chen ,  Po-Yuan Liu ,  Tsung-Ting Tsai

IPC分类号： G02F1/1333 ,  G02F1/1345

CPC分类号： G02F1/1362 ,  G02F1/13454 ,  G02F1/136286 ,  G02F2001/136254 ,  G02F2203/69

摘要： A flat-panel display device having test architecture is disclosed for disposing shorting bars without sacrificing wiring-on-array bus layout area of the outer-lead-bonding region. The flat-panel display device essentially includes a substrate having a plurality of driving integrated-circuit (IC) mounting areas, a plurality of signal lines and transmission lines disposed on the substrate, and a plurality of shorting bars disposed on the driving IC mounting areas. Each shorting bar is coupled to a corresponding signal line and a corresponding transmission line. Furthermore, in order to take out the laser-cutting process in the fabrication of the flat-panel display device for saving production cost, each driving IC mounting area is further disposed with a plurality of transistors for controlling the signal connections between the shorting bars and the signal lines, and also for controlling the signal connections between the shorting bars and the transmission lines.

摘要翻译： 公开了一种具有测试架构的平板显示装置，用于在不牺牲外引线接合区域的阵列总线布局面积的情况下设置短路棒。 平板显示装置基本上包括具有多个驱动集成电路（IC）安装区域的基板，设置在基板上的多条信号线和传输线以及设置在驱动IC安装区域上的多个短路棒 。 每个短路条耦合到对应的信号线和对应的传输线。 此外，为了在制造平板显示装置的同时取出激光切割工艺以节省生产成本，每个驱动IC安装区域还配置有多个晶体管，用于控制短路棒和短路棒之间的信号连接 信号线，并且还用于控制短路棒和传输线之间的信号连接。

公开(公告)号：US08027426B1

公开(公告)日：2011-09-27

申请号：US12837244

申请日：2010-07-15

申请人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Yu-Chung Yang ,  Kuo-Chang Su ,  Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2310/0286 ,  G11C19/184

摘要： An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.

摘要翻译： 示例性移位寄存器包括多个晶体管。 对晶体管进行起始脉冲信号，第一时钟信号和第二时钟信号的控制，以产生栅极驱动信号。 第一时钟信号和第二时钟信号相对于彼此相位反相。 第一时钟信号的逻辑低电平和第二时钟信号的另一个逻辑低电平彼此不同。 而且，晶体管是负阈值电压晶体管。 在晶体管处于截止状态的情况下，每个晶体管的栅极处的电位低于晶体管的源极/漏极处的另一个电位。

公开(公告)号：US20110002437A1

公开(公告)日：2011-01-06

申请号：US12607156

申请日：2009-10-28

申请人： Kuo-Chang Su ,  Tsung-Ting Tsai ,  Yung-Chih Chen ,  Chun-Hsin Liu

发明人： Kuo-Chang Su ,  Tsung-Ting Tsai ,  Yung-Chih Chen ,  Chun-Hsin Liu

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register is provided and includes a first shift registering unit and a second shift registering unit. The first shift registering unit generates a first trigger signal at a first output terminal and includes a first pull-down circuit. The second shift registering unit receives the first trigger signal and generates a second trigger signal at a second output terminal. The first trigger signal and the second trigger signal are sequentially asserted. The second shift registering unit includes a second pull-down circuit. The first pull-down circuit and the second pull-down circuit perform pull-down operations at different times. When the first pull-down circuit does not perform the pull-down operation, the second pull-down circuit performs pull-down operations to the first output terminal.

摘要翻译： 提供一个移位寄存器，包括一个第一移位寄存单元和一个第二移位寄存单元。 第一移位寄存单元在第一输出端产生第一触发信号，并包括第一下拉电路。 第二移位寄存单元接收第一触发信号并在第二输出端产生第二触发信号。 第一触发信号和第二触发信号被依次断言。 第二移位登记单元包括第二下拉电路。 第一下拉电路和第二下拉电路在不同时间执行下拉操作。 当第一下拉电路不执行下拉操作时，第二下拉电路对第一输出端子执行下拉操作。