公开(公告)号：US08736180B2

公开(公告)日：2014-05-27

申请号：US12959000

申请日：2010-12-02

申请人： Tsung-Ting Tsai ,  Lee-Hsun Chang

发明人： Tsung-Ting Tsai ,  Lee-Hsun Chang

IPC分类号： G09G3/10

CPC分类号： H05B33/0896 ,  Y02B20/36

摘要： An OLED display includes an OLED panel, two conducting wires and a power supply. A display region of the OLED panel is divided into two sub-display regions. The two conducting wires are both disposed on the panel and out of the display region, and first terminals of the two conducting wires are electrically coupled to pixels in the first sub-display region and the second sub-display region respectively. The length of a conducting wire is longer than that of another conducting wire so that the resistance of the conducting wire is larger than that of the said another conducting wire. The power supply provides a relatively high voltage and a relatively low voltage to the second terminals of the relatively long conducting wire and the relatively short conducting wire respectively, so that the voltages of the first terminals of the two conducting wires are substantially the same.

摘要翻译： OLED显示器包括OLED面板，两根导线和电源。 OLED面板的显示区域被分成两个子显示区域。 两个导线都布置在面板上并且在显示区域之外，并且两个导线的第一端子分别电耦合到第一子显示区域和第二子显示区域中的像素。 导线的长度比另一导线的长度长，使得导线的电阻大于所述另一导线的电阻。 电源对相对长的导线和相对较短的导线分别提供相对较高的电压和较低的电压，使得两个导线的第一端子的电压基本上相同。

公开(公告)号：US08669924B2

公开(公告)日：2014-03-11

申请号：US12722040

申请日：2010-03-11

申请人： Tzu-Yin Kuo ,  Tsung-Ting Tsai

发明人： Tzu-Yin Kuo ,  Tsung-Ting Tsai

IPC分类号： G06F3/038

CPC分类号： G09G3/3258 ,  G09G5/10 ,  H01L27/3269

摘要： In one aspect, the present invention relates to a display. In one embodiment, the display has a substrate, and a plurality of pixels formed on the substrate and arranged in an array. Each pixel includes a driving transistor and a read-out transistor spatially formed on the substrate, where each transistor has a gate electrode, a drain electrode and a source electrode, an organic light emitting diode (OLED) having a cathode layer, a anode layer and an emissive layer formed between the cathode layer and the anode layer, and formed over the driving transistor and the read-out transistor such that the anode layer of the OLED is electrically connected to the source electrode of the driving transistor, and a photo sensor having a photosensitive layer formed between the anode layer of the OLED and the source electrode of the read-out transistor.

摘要翻译： 一方面，本发明涉及显示器。 在一个实施例中，显示器具有衬底和形成在衬底上并以阵列布置的多个像素。 每个像素包括在基板上空间形成的驱动晶体管和读出晶体管，其中每个晶体管具有栅电极，漏电极和源电极，具有阴极层的有机发光二极管（OLED），阳极层 以及形成在阴极层和阳极层之间的发光层，并且形成在驱动晶体管和读出晶体管上，使得OLED的阳极层电连接到驱动晶体管的源电极，并且光电传感器 具有形成在OLED的阳极层和读出晶体管的源电极之间的感光层。

公开(公告)号：US08456454B2

公开(公告)日：2013-06-04

申请号：US12488946

申请日：2009-06-22

申请人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Tsung-Ting Tsai ,  Kuo-Chang Su

发明人： Yung-Chih Chen ,  Chun-Hsin Liu ,  Tsung-Ting Tsai ,  Kuo-Chang Su

IPC分类号： G06F3/038 ,  G09G5/00 ,  G02F1/1333

CPC分类号： G09G3/3677 ,  G09G2300/0426 ,  G09G2330/08 ,  G09G2330/12

摘要： A display panel is disclosed, which includes a substrate, a shift register array, plural scan lines, a compensating circuit, a first repair line, and a second repair line. The shift register array having plural shift registers is disposed on a non-display area of the substrate. The scan lines connect to the shift registers respectively to drive plural display units. The first repair line and the second repair line are connected to the compensating circuit and bridged over two ends of each scan line in the non-display area, respectively.

摘要翻译： 公开了一种显示面板，其包括基板，移位寄存器阵列，多条扫描线，补偿电路，第一修复线和第二修复线。 具有多个移位寄存器的移位寄存器阵列设置在基板的非显示区域上。 扫描线分别连接到移位寄存器以驱动多个显示单元。 第一修理线和第二修复线分别连接到补偿电路并桥接在非显示区域中的每条扫描线的两端。

公开(公告)号：US08279243B2

公开(公告)日：2012-10-02

申请号：US12327938

申请日：2008-12-04

申请人： Chih-Lung Lin ,  Tsung-Ting Tsai ,  Kuo-Chao Liao

发明人： Chih-Lung Lin ,  Tsung-Ting Tsai ,  Kuo-Chao Liao

IPC分类号： G09G5/10

CPC分类号： G09G3/3233 ,  G09G2300/0819 ,  G09G2320/0233

摘要： A driving circuit includes: a switch unit operable according to a scan signal, and adapted for permitting transfer of a data signal when operating in an on state; a capacitor having a first end that is coupled to the switch unit, and a second end; a first transistor having a first terminal that is adapted for coupling to a voltage source, a second terminal that is coupled to the second end of the capacitor and that is adapted to be coupled to a load, and a control terminal that is coupled to the first end of the capacitor; and a second transistor having a first terminal that is adapted for coupling to the voltage source, a second terminal coupled to the second terminal of the first transistor, and a control terminal that is adapted for receiving a bias voltage. Each of the first and second transistors operates in the linear region.

摘要翻译： 驱动电路包括：开关单元，其可根据扫描信号进行操作，并且适于在接通状态下操作时允许数据信号的传送; 具有耦合到所述开关单元的第一端的电容器，以及第二端; 第一晶体管，其具有适于耦合到电压源的第一端子，耦合到电容器的第二端并且适于耦合到负载的第二端子，以及耦合到电容器的控制端子 电容器的第一端; 以及第二晶体管，其具有适于耦合到电压源的第一端子，耦合到第一晶体管的第二端子的第二端子和适于接收偏置电压的控制端子。 第一和第二晶体管中的每一个在线性区域中工作。

公开(公告)号：US20120139819A1

公开(公告)日：2012-06-07

申请号：US13038391

申请日：2011-03-02

申请人： Tsung-Ting Tsai

发明人： Tsung-Ting Tsai

IPC分类号： G09G3/30

CPC分类号： H01L27/326 ,  G09G3/3225 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0809 ,  H01L27/3276 ,  H01L2251/5323

摘要： An organic light emitting diode (OLED) pixel array includes a plurality of first signal lines, a plurality of second signal lines, and a plurality of pixel array units. The pixel array units are arranged in array on a substrate. Each of the pixel array units includes a plurality of OLED pixels. The OLED pixels are connected to the same first signal line and respectively connected to a first portion and a second portion of the second signal lines. At least two of the OLED pixels are located between the first portion and the second portion. A transmittance region is surrounded by the first portion, the second portion, and the OLED pixels, and the first portion and the second portion are respectively located at two opposite sides of the transmittance region.

摘要翻译： 有机发光二极管（OLED）像素阵列包括多个第一信号线，多个第二信号线和多个像素阵列单元。 像素阵列单元以阵列的形式排列在基板上。 每个像素阵列单元包括多个OLED像素。 OLED像素连接到相同的第一信号线并分别连接到第二信号线的第一部分和第二部分。 至少两个OLED像素位于第一部分和第二部分之间。 透射区域由第一部分，第二部分和OLED像素围绕，第一部分和第二部分分别位于透射区域的两个相对侧。

公开(公告)号：US08175215B2

公开(公告)日：2012-05-08

申请号：US12572247

申请日：2009-10-01

申请人： Chun-Hsin Liu ,  Tsung-ting Tsai ,  Kuo-Chang Su ,  Yung-Chih Chen

发明人： Chun-Hsin Liu ,  Tsung-ting Tsai ,  Kuo-Chang Su ,  Yung-Chih Chen

IPC分类号： G11C19/00

CPC分类号： G11C19/28

摘要： A shift register includes multiple cascade-connected stages. Each stage generates an output signal in response to a clock signal and a first control signal. Each stage includes a pull-up module, a pull-up driving module, a first pull-down module, a second pull-down module, and a third pull-down module. The pull-up module is used for providing the output signal based on the clock signal. The pull-up driving module turns on the pull-up module in response to a first control signal. The first pull-down module adjusts voltage level on the first node to a first supply voltage in response to a second control signal. The second pull-down module adjusts voltage level on the output end to a second supply voltage in response to the second control signal. The third pull-down module adjusts voltage level on the second node to a third supply voltage in response to a third control signal.

摘要翻译： 移位寄存器包括多个级联连接级。 每一级响应于时钟信号和第一控制信号产生输出信号。 每个级包括上拉模块，上拉驱动模块，第一下拉模块，第二下拉模块和第三下拉模块。 上拉模块用于根据时钟信号提供输出信号。 上拉驱动模块响应于第一控制信号而导通上拉模块。 第一下拉模块响应于第二控制信号将第一节点上的电压电平调整到第一电源电压。 第二下拉模块响应于第二控制信号将输出端上的电压电平调整到第二电源电压。 第三下拉模块响应于第三控制信号将第二节点上的电压电平调整到第三电源电压。

公开(公告)号：US08149985B2

公开(公告)日：2012-04-03

申请号：US13235708

申请日：2011-09-19

申请人： Tsung-Ting Tsai

发明人： Tsung-Ting Tsai

IPC分类号： G11C19/00

CPC分类号： H03K19/096 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2310/0286 ,  G11C19/184 ,  H03K5/135

摘要： A shift register comprising a plurality of shift register stages {SN}, N=1, 2, . . . , M, M being a nonzero positive integer. Each of the plurality of shift register stages, SN, comprises a first input, a second input, a third input for receiving a first clock signal CK, a fourth input for receiving a second clock signal XCK, an output for providing an output signal OUT(N), therefrom. The plurality of stages {SN} is electrically connected to each other in serial such that the first input of the shift register stage SN is electrically connected to the output of the (N−1)-th shift register stage SN−1 for receiving an output signal OUT(N−1) therefrom, the second input of the shift register stage SN is electrically connected to the output of the (N+1)-th shift register stage SN+1 for receiving an output signal OUT(N+1) therefrom, and the output of the shift register stage SN is electrically connected to the first input of the (N+1)-th shift register stage, SN+1 for providing the output signal OUT(N+1) thereto.

摘要翻译： 一种移位寄存器，包括多个移位寄存器级{SN}，N = 1,2。 。 。 ，M，M为非零正整数。 多个移位寄存器级SN中的每一个包括第一输入，第二输入，用于接收第一时钟信号CK的第三输入端，用于接收第二时钟信号XCK的第四输入端，用于提供输出信号OUT （N）。 多个级（SN）以串联方式彼此电连接，使得移位寄存器级SN的第一输入电连接到第（N-1）位移位寄存器级SN-1的输出端，用于接收 输出信号OUT（N-1），移位寄存器级SN的第二输入电连接到第（N + 1）位移位寄存器级SN + 1的输出，用于接收输出信号OUT（N + 1） ），并且移位寄存器级SN的输出电连接到第（N + 1）移位寄存器级的第一输入SN + 1，用于向其提供输出信号OUT（N + 1）。

公开(公告)号：US08054935B2

公开(公告)日：2011-11-08

申请号：US12617869

申请日：2009-11-13

申请人： Tsung-Ting Tsai

发明人： Tsung-Ting Tsai

IPC分类号： G11C19/00

CPC分类号： H03K19/096 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2310/0286 ,  G11C19/184 ,  H03K5/135

摘要： A shift register comprising a plurality of shift register stages {SN}, N=1, 2, . . . , M, M being a nonzero positive integer. Each of the plurality of shift register stages, SN, comprises a first input, a second input, a third input for receiving a first clock signal CK, a fourth input for receiving a second clock signal XCK, an output for providing an output signal OUT(N), therefrom. The plurality of stages {SN} is electrically connected to each other in serial such that the first input of the shift register stage SN is electrically connected to the output of the (N−1)-th shift register stage SN−1 for receiving an output signal OUT(N−1) therefrom, the second input of the shift register stage SN is electrically connected to the output of the (N+1)-th shift register stage SN+1 for receiving an output signal OUT(N+1) therefrom, and the output of the shift register stage SN is electrically connected to the first input of the (N+1)-th shift register stage, SN+1 for providing the output signal OUT(N+1) thereto.

摘要翻译： 一种移位寄存器，包括多个移位寄存器级{SN}，N = 1,2。 。 。 ，M，M为非零正整数。 多个移位寄存器级SN中的每一个包括第一输入，第二输入，用于接收第一时钟信号CK的第三输入端，用于接收第二时钟信号XCK的第四输入端，用于提供输出信号OUT （N）。 多个级（SN）以串联方式彼此电连接，使得移位寄存器级SN的第一输入电连接到第（N-1）位移位寄存器级SN-1的输出端，用于接收 输出信号OUT（N-1），移位寄存器级SN的第二输入电连接到第（N + 1）位移位寄存器级SN + 1的输出，用于接收输出信号OUT（N + 1） ），并且移位寄存器级SN的输出电连接到第（N + 1）移位寄存器级的第一输入SN + 1，用于向其提供输出信号OUT（N + 1）。

公开(公告)号：US08049828B2

公开(公告)日：2011-11-01

申请号：US12178662

申请日：2008-07-24

申请人： Chun-Hsin Liu ,  Yung-Chih Chen ,  Po-Yuan Liu ,  Tsung-Ting Tsai

发明人： Chun-Hsin Liu ,  Yung-Chih Chen ,  Po-Yuan Liu ,  Tsung-Ting Tsai

IPC分类号： G02F1/1333 ,  G02F1/1345

CPC分类号： G02F1/1362 ,  G02F1/13454 ,  G02F1/136286 ,  G02F2001/136254 ,  G02F2203/69

摘要： A flat-panel display device having test architecture is disclosed for disposing shorting bars without sacrificing wiring-on-array bus layout area of the outer-lead-bonding region. The flat-panel display device essentially includes a substrate having a plurality of driving integrated-circuit (IC) mounting areas, a plurality of signal lines and transmission lines disposed on the substrate, and a plurality of shorting bars disposed on the driving IC mounting areas. Each shorting bar is coupled to a corresponding signal line and a corresponding transmission line. Furthermore, in order to take out the laser-cutting process in the fabrication of the flat-panel display device for saving production cost, each driving IC mounting area is further disposed with a plurality of transistors for controlling the signal connections between the shorting bars and the signal lines, and also for controlling the signal connections between the shorting bars and the transmission lines.

摘要翻译： 公开了一种具有测试架构的平板显示装置，用于在不牺牲外引线接合区域的阵列总线布局面积的情况下设置短路棒。 平板显示装置基本上包括具有多个驱动集成电路（IC）安装区域的基板，设置在基板上的多条信号线和传输线以及设置在驱动IC安装区域上的多个短路棒 。 每个短路条耦合到对应的信号线和对应的传输线。 此外，为了在制造平板显示装置的同时取出激光切割工艺以节省生产成本，每个驱动IC安装区域还配置有多个晶体管，用于控制短路棒和短路棒之间的信号连接 信号线，并且还用于控制短路棒和传输线之间的信号连接。

公开(公告)号：US20110158376A1

公开(公告)日：2011-06-30

申请号：US13041794

申请日：2011-03-07

申请人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

发明人： Tsung-Ting Tsai ,  Ming-Sheng Lai ,  Min-Feng Chiang ,  Po-Yuan Liu

IPC分类号： G11C19/34

CPC分类号： G11C19/28

摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.