摘要:
A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value.
摘要:
A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value.
摘要:
A method and apparatus are provided for sigma-delta (ΣΔ) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least One low-order bit.
摘要:
An image sensor includes an analog-to-digital converter (ADC) and a decimation filter. The decimation filter includes a first digital data generator and a second digital data generator. The first digital data generator is configured to integrate sigma-delta modulated M-bit pixel data and output N-bit pixel data based on an integration result. The second digital data generator is configured to integrate the N-bit pixel data, generate P-bit pixel data based on an integration result, and output the P-bit pixel data as decimated data.
摘要:
A method and apparatus are provided for sigma-delta (ΣΔ) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least one low-order bit.
摘要:
An image sensor includes an analog-to-digital converter (ADC) and a decimation filter. The decimation filter includes a first digital data generator and a second digital data generator. The first digital data generator is configured to integrate sigma-delta modulated M-bit pixel data and output N-bit pixel data based on an integration result. The second digital data generator is configured to integrate the N-bit pixel data, generate P-bit pixel data based on an integration result, and output the P-bit pixel data as decimated data.
摘要:
In one embodiment, an analog-to-digital converter (ADC) includes a comparator and a supply circuit. The comparator is configured to compare an input signal to a reference signal. The supply circuit is configured to supply the reference signal. The supply circuit is configured to provide different circuit configurations for supplying the reference signal during different stages of analog-to-digital conversion such that the reference signal is scaled in substantially a same manner during at least two of the stages.
摘要:
In one embodiment, an analog-to-digital converter (ADC) includes a comparator and a supply circuit. The comparator is configured to compare an input signal to a reference signal. The supply circuit is configured to supply the reference signal. The supply circuit is configured to provide different circuit configurations for supplying the reference signal during different stages of analog-to-digital conversion such that the reference signal is scaled in substantially a same manner during at least two of the stages.
摘要:
A data sampler and a photo detecting apparatus compensate a reference signal with offset information measured from a unit pixel, and compare an offset-compensated reference signal with a data signal, thereby minimizing the impact of an offset occurring with an increase of gain in the data sampler.
摘要:
An analog-to-digital converter (ADC) within an image sensor includes a comparator comparing a ramp signal with an image signal, and a counter generating a count result in response to the comparison by counting a clock during a counting interval. The ADC determines whether a first counting interval for the counter is less than a reference interval, and if the first counting interval is less than the reference interval the counting interval is a first counting interval, else the counting interval is a second counting interval.